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FXPS7115D4 数据表(PDF) 24 Page - NXP Semiconductors |
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FXPS7115D4 数据表(HTML) 24 Page - NXP Semiconductors |
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24 / 75 page ![]() NXP Semiconductors FXPS7115D4 Digital absolute pressure sensor, 40 kPa to 115 kPa 7.5.3.4.2 Reserved command response message format MSB: bit 15; LSB: bit 0 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Command Echo Data 8-bit CRC x x x x x x x x x x x x x x x x x x x x x x x x CRC[7:0] Table 27. Reserved command response message format Bit field Definition Command echo Reserved command echo. Undefined Data Response data. Undefined CRC[7:0] 8-bit CRC Table 28. Reserved command response message bit field descriptions 7.5.4 Error checking 7.5.4.1 Default 8-bit CRC 7.5.4.1.1 Command error checking The device calculates an 8-bit CRC on the entire 32 bits of each command. Message data is entered into the CRC calculator MSB first, consistent with the transmission order of the message. If the calculated CRC does not match the transmitted CRC, the command is ignored and the device responds with the SPI error response. The CRC decoding procedure is as follows: 1. A seed value is preset into the LSB of the shift register. 2. Using a serial CRC calculation method, the receiver rotates the received message and CRC into the LSB of the shift register in the order received (MSB first). 3. When the calculation on the last bit of the CRC is rotated into the shift register, the shift register contains the CRC check result. 4. If the shift register contains all zeros, the CRC is correct. 5. If the shift register contains a value other than zero, the CRC is incorrect. The CRC polynomial and seed are shown in Table 29. SPICRCSEED[3:0] Default Polynomial Default non-direct Seed 0000 x8+ x5+ x3+ x2+ x + 1 1111 1111 non-zero x8+ x5+ x3+ x2+ x + 1 1111 SPICRCSEED[3:0] Table 29. SPI Command Message CRC 7.5.4.1.2 Response error checking The device calculates a CRC on the entire 32 bits of each response. Message data is entered into the CRC calculator MSB first, consistent with the transmission order of the message. The CRC encoding procedure is as follows: 1. A seed value is preset into the LSB of the shift register. 2. Using a serial CRC calculation method, the transmitter rotates the transmitted message and CRC into the LSB of the shift register (MSB first). FXPS7115D4 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2022. All rights reserved. Product data sheet Rev. 6 — 6 June 2022 24 / 75 |
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