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FXPS7115D4 数据表(PDF) 74 Page - NXP Semiconductors |
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FXPS7115D4 数据表(HTML) 74 Page - NXP Semiconductors |
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74 / 75 page  NXP Semiconductors FXPS7115D4 Digital absolute pressure sensor, 40 kPa to 115 kPa Contents 1 General description ............................................ 1 2 Features and benefits .........................................1 3 Applications .........................................................2 3.1 Automotive .........................................................2 3.2 Industrial ............................................................ 2 3.3 Medical/Consumer ............................................. 2 4 Ordering information .......................................... 2 4.1 Ordering options ................................................ 2 5 Block diagram ..................................................... 3 6 Pinning information ............................................ 3 6.1 Pinning ...............................................................3 6.2 Pin description ................................................... 4 7 Functional description ........................................4 7.1 Voltage regulators ..............................................4 7.1.1 VCC, VREG, VREGA, undervoltage monitor ...............................................................5 7.2 Internal oscillator ............................................... 5 7.3 Pressure sensor signal path ..............................5 7.3.1 Self-test functions .............................................. 5 7.3.1.1 PABS common mode verification ...................... 6 7.3.1.2 Startup digital self-test verification .....................6 7.3.1.3 Startup sense data fixed value verification ........ 7 7.3.2 ΣΔ converter ......................................................7 7.3.3 Digital signal processor (DSP) ...........................8 7.3.3.1 Decimation sinc filter ......................................... 8 7.3.3.2 Signal trim and compensation ........................... 8 7.3.3.3 Low-pass filter ................................................... 9 7.3.3.4 Absolute pressure output data scaling equation ........................................................... 11 7.3.4 Temperature sensor .........................................11 7.3.4.1 Temperature sensor signal chain .....................11 7.3.4.2 Temperature sensor output scaling equation ........................................................... 12 7.3.5 Common mode error detection signal chain .... 12 7.4 Inter-integrated circuit (I2C) interface .............. 12 7.4.1 I2C bit transmissions ....................................... 13 7.4.2 I2C start condition ........................................... 13 7.4.3 I2C byte transmission ......................................13 7.4.4 I2C acknowledge and not acknowledge transmissions ...................................................14 7.4.5 I2C stop condition ............................................14 7.4.6 I2C register transfers .......................................15 7.4.6.1 Register write transfers ....................................15 7.4.6.2 Register read transfers ....................................16 7.4.6.3 Sensor data register read wrap around ........... 16 7.4.7 I2C timing diagram .......................................... 17 7.5 Standard 32-bit SPI protocol ........................... 17 7.5.1 SPI command format .......................................18 7.5.2 SPI response format ........................................19 7.5.3 Command summary ........................................ 20 7.5.3.1 Register read command .................................. 20 7.5.3.2 Register write command ..................................21 7.5.3.3 Sensor data request commands ......................22 7.5.3.4 Reserved commands .......................................23 7.5.4 Error checking ................................................. 24 7.5.4.1 Default 8-bit CRC ............................................ 24 7.5.5 Exception handling .......................................... 25 7.5.5.1 Basic status field ............................................. 25 7.5.5.2 Detailed status field ......................................... 26 7.5.5.3 SPI error .......................................................... 26 7.5.5.4 SPI data output verification error ..................... 26 7.5.6 SPI timing diagram .......................................... 27 7.6 User-accessible data array ..............................27 7.7 Register information .........................................31 7.7.1 COUNT - rolling counter register (address 00h) ..................................................................31 7.7.2 Device status registers .................................... 31 7.7.2.1 DEVSTAT - device status register (address 01h) ..................................................................31 7.7.2.2 DEVSTAT1 - device status register (address 02h) .................................................. 32 7.7.2.3 DEVSTAT2 - device status register (address 03h) .................................................. 33 7.7.2.4 DEVSTAT3 - device status register (address 04h) .................................................. 34 7.7.3 TEMPERATURE - temperature register (address 0Eh) .................................................. 34 7.7.4 DEVLOCK_WR - lock register writes register (address 10h) ..................................... 35 7.7.5 WRITE_OTP_EN – write OTP enable register (address 11h) ......................................36 7.7.6 UF_REGION_W, UF_REGION_R - UF region selection registers (address 14h, 15h) ..................................................................37 7.7.7 SOURCEID_x - source identification registers (address 1Ah, 1Bh) ...........................39 7.7.7.1 Data source enable bits (SIDx_EN) .................39 7.7.8 SPI Configuration Control Register (SPI_ CFG, Address 3Dh) .........................................40 7.7.8.1 SPI Data Field Size (DATASIZE) ..................... 40 7.7.8.2 SPI CRC Length and Seed Bits ...................... 40 7.7.9 WHO_AM_I - who am I register (address 3Eh) ................................................................. 40 7.7.10 I2C_ADDRESS - I2C client address register (address 3Fh) ..................................... 41 7.7.11 DSP Configuration Registers (DSP_CFG_ Ux) ................................................................... 41 7.7.11.1 Self-test control bits .........................................41 7.7.11.2 DSP_CFG_U1 - DSP user configuration #1 register (address 40h) ..................................... 42 7.7.11.3 DSP_CFG_U3 - DSP user configuration #3 register (address 42h) ..................................... 42 7.7.11.4 DSP_CFG_U4 - DSP user configuration #4 register (address 43h) ..................................... 43 7.7.11.5 DSP_CFG_U5 - DSP user configuration #5 register (address 44h) ..................................... 43 7.7.12 INT_CFG - interrupt configuration register (address 45h) .................................................. 44 7.7.13 P_INT_HI, P_INT_LO - interrupt window comparator threshold registers (address 46h to 49h) ...................................................... 45 FXPS7115D4 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2022. All rights reserved. Product data sheet Rev. 6 — 6 June 2022 74 / 75 |
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