FT902L-R datasheet(18/67 Pages) BRIDGETEK

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FT900

/1/2/3 Revision C Embedded Microcontroller Datasheet

Version 1.0

Document No.: BRT_000172 Clearance No.: BRT#087

No.

Name

Type

Description

RESETN

Chip reset input for normal operation. Active low.

Connect external 10kΩ pull-up to VCC3V3 for safe operation.

STESTRESETN

Chip reset input for test mode.

Connect this pin to Ground via a 10kΩ resistor for normal operation.

DEBUG

I/O

One-wire debugger interface input/output. By default, this pin is pull-up

with 75KΩ.

UART0_TXD/GPIO48

I/O

GPIO48 input/output. (By default is GPIO input, internal pull-low)

Transmitter output for UART0.

UART0_RXD/GPIO49

I/O

GPIO49 input/output. (By default is GPIO input, internal pull-low)

Receiver input for UART0.

UART0_RTS/GPIO50

I/O

GPIO50 input/output. (By default is GPIO input, internal pull-low)

Request to send output for UART0.

UART0_CTS/GPIO51

I/O

GPIO51 input/output. (By default is GPIO input, internal pull-low)

Clear to send input for UART0.

UART0_DTR/UART1_TXD/

PWM4/GPIO52

I/O

GPIO52 input/output. (By default is GPIO input, internal pull-low)

PWM channel 4, output.

Transmitter output for UART1.

Data terminal ready output for UART0.

UART0_DSR/UART1_RXD/

PWM5/GPIO53

I/O

GPIO53 input/output. (By default is GPIO input, internal pull-low)

PWM channel 5, output.

Receiver input for UART1.

Data set ready input for UART0.

UART0_DCD/UART1_RTS/

PWM6/GPIO54

I/O

GPIO54 input/output. (By default is GPIO input, internal pull-low)

PWM channel 6, output.

Request to send output for UART1.

Data carrier detection input for UART0.

UART0_RI/UART1_CTS/

PWM7/GPIO55

I/O

GPIO55 input/output. (By default is GPIO input, internal pull-low)

PWM channel 7, output.

Clear to send input for UART1.

Ring indicator input for UART0.

GND

Ground

VCCIO3V3

+3.3V supply voltage.

This is the supply voltage for all the I/O ports. Connect 10uF and 0.1uF

decoupling capacitors to GND. This pin must be connected to pin 33

and pin 64.

PWM0/GPIO56

I/O

GPIO56 input/output. (By default is GPIO input, internal pull-low)

PWM channel 0, output.

A stereo 16/8-bit PCM audio data channel output.

FT902L-R 数据表(PDF) 18 Page - Bridgetek Pte Ltd.

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