Si32172/3/5

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Rev. 1.0 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • August 31, 2021

7. System Interfaces

7.1. Integrated Serial Interface

The Si32266/7/8/9 devices' integrated serial interface (ISI) is a three-wire proprietary interface which serializes SPI

and PCM communications and interrupts, reducing the SoC interface from nine wires to three (PSCLK, MISO,

MOSI). SPI communications and PCM data transfers are embedded in the serial data. The host side of the ISI is

integrated onto selected SoCs from several vendors.

ISI is a point to point interface, it is not possible to daisy chain more than one ISI ProSLIC device.

Both µ-255 Law (µ-Law) and A-law companding formats are supported in addition to 16-bit linear data mode with

no companding.

7.2. Input/Output Voltage Selection

Revision C devices have the ability to gluelessly interface directly to 1.8 V devices via the ISI and RST pins

(PSCLK, MISO, MOSI, RST). The I/O voltage selection is made by attaching the desired voltage (3.3 V or 1.8 V) to

the VDDIO pin (pin 1).

To avoid power supply sequencing issues, VDDIO should be connected to the same supply as VDD in 3.3 V

interface designs and VDDIO should be connected to VDDREG in 1.8 V interface designs.

Other voltages between 1.8 V and 3.3 V can also be used for VDDIO (for example 2.5 V), but steps must be taken

to ensure that the VDDIO supply comes up after the VDD supply if VDDIO is not connected to VDD or VDDREG.