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LTC3313JVPBF 数据表(PDF) 9 Page - Analog Devices

部件名 LTC3313JVPBF
功能描述  5V, 15A Synchronous Step-Down Silent Switcher in 3mm × 3mm LQFN
PDF  28 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

LTC3313JVPBF 数据表(HTML) 9 Page - Analog Devices

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LTC3313
9
Rev. 0
For more information www.analog.com
PIN FUNCTIONS
EN (Pin 1): The EN pin has a precision enable threshold
with hysteresis. An optional external resistor divider, from
VIN or from another supply, programs the threshold below
which the LTC3313 will shut down. If the precision thresh-
old is not used, directly connect the pin to VIN. When the
EN pin is low, the LTC3313 enters a low current shutdown
mode where all internal circuitry is disabled.
AGND (Pin 2): The AGND pin is the output voltage remote
ground sense. Connect the AGND pin directly to the nega-
tive terminal of the output capacitor at the load and to the
feedback divider resistor.
VIN (Pins 3, 4, 11, 12): The VIN pins supply current to the
internal circuitry and topside power switch. All of the VIN
pins must be connected together with short, wide traces
and bypassed to PGND with low ESR capacitors located
as close as possible to the pins.
PGND (Pins 5, 10, 19): The PGND pins are the return
path of the internal bottom side power switch. Connect
the PGND pins together and to the exposed pad. Connect
the negative terminal of the input capacitors as close to
the PGND pins as possible. The PGND node is the main
thermal highway and should be connected to a large PCB
ground plane with many large vias.
SW (Pins 6–9): The SW pins are the switching outputs of
the internal power switches. Connect these pins together
to the inductor with short, wide traces.
MODE/SYNC (Pin 13): The MODE/SYNC pin facilitates
multiphase operation and synchronization to an external
clock. Depending on the mode of operation, the MODE/
SYNC pin either accepts an input clock pulse or outputs
a clock pulse at its operating frequency. (see Multiphase
Operation in Applications Information). The MODE/SYNC
pin also programs the mode of operation: pulse-skipping
or forced continuous.
PGOOD (Pin 14): The PGOOD pin is a power good pin and
is the open drain output of an internal comparator. The
PGOOD output is pulled low when VIN is above 2.25V and
the part is in shutdown. When connecting multiple phases
in parallel, connect the PGOOD pins together.
RT (Pin 15): The RT pin sets the oscillator frequency
with an external resistor to AGND or sets the phasing
for multiphase operation (see Multiphase Operation in
Applications Information).
SSTT (Pin 16): Soft-Start, Track, Temperature Monitor.
An internal 10µA current into an external capacitor at the
soft-start pin programs the output voltage ramp rate dur-
ing start-up. During the soft-start cycle, the FB pin voltage
will track the SSTT pin voltage. When the soft-start cycle
is complete, the tracking function is disabled, the internal
reference resumes control of the error amplifier and the
SSTT pin servos to a voltage representative of junction
temperature. For a clean recovery from an output short
circuit condition, the SSTT pin is pulled down to approxi-
mately 140mV above the VFB voltage and a new soft-start
cycle is initiated. During shutdown and fault conditions,
the SSTT pin is pulled to ground.
ITH (Pin 17): The ITH pin is the compensation node for
the output voltage regulation control loop. Compensation
components connected to this pin are referenced to AGND.
FB (Pin 18): The feedback pin is externally connected to
the output voltage via a resistive divider and is internally
connected to the inverting input of the error amplifier.
The LTC3313 regulates the FB pin to 500mV. A phase-
lead capacitor connected between FB and VOUT is used to
optimize the transient response.



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