数据搜索系统,热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

TDA4VE...ALZQ1 数据表(PDF) 61 Page - Texas Instruments

部件名 TDA4VE...ALZQ1
功能描述  TDA4VE TDA4AL TDA4VL Jacinto™ Processors, Silicon Revision 1.0
PDF  251 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  TI [Texas Instruments]
网页  http://www.ti.com
标志 TI - Texas Instruments

TDA4VE...ALZQ1 数据表(HTML) 61 Page - Texas Instruments

Back Button TDA4VE...ALZQ1 Datasheet HTML 57Page - Texas Instruments TDA4VE...ALZQ1 Datasheet HTML 58Page - Texas Instruments TDA4VE...ALZQ1 Datasheet HTML 59Page - Texas Instruments TDA4VE...ALZQ1 Datasheet HTML 60Page - Texas Instruments TDA4VE...ALZQ1 Datasheet HTML 61Page - Texas Instruments TDA4VE...ALZQ1 Datasheet HTML 62Page - Texas Instruments TDA4VE...ALZQ1 Datasheet HTML 63Page - Texas Instruments TDA4VE...ALZQ1 Datasheet HTML 64Page - Texas Instruments TDA4VE...ALZQ1 Datasheet HTML 65Page - Texas Instruments Next Button
Zoom Inzoom in Zoom Outzoom out
 61 / 251 page
background image
Table 6-6. DDRSS0 Signal Descriptions (continued)
SIGNAL NAME
PIN TYPE
DESCRIPTION
ALZ PIN
DDR0_DQS2P
IO
DDRSS Data Strobe
V1
DDR0_DQS3N
IO
DDRSS Complimentary Data Strobe
AC1
DDR0_DQS3P
IO
DDRSS Data Strobe
AB1
(1)
An external 240 Ω ±1% resistor must be connected between this pin and VSS. No external voltage should be applied to this pin.
Table 6-7. DDRSS1 Signal Descriptions
SIGNAL NAME
PIN TYPE
DESCRIPTION
ALZ PIN
DDR1_CKN
IO
DDRSS Differential Clock (negative)
A9
DDR1_CKP
IO
DDRSS Differential Clock (positive)
A10
DDR1_RESETn
IO
DDRSS Reset
F12
DDR1_RET
I
DDR Retention Enable
J10
DDR1_CA0
IO
DDRSS Command Address
C10
DDR1_CA1
IO
DDRSS Command Address
E10
DDR1_CA2
IO
DDRSS Command Address
E9
DDR1_CA3
IO
DDRSS Command Address
B10
DDR1_CA4
IO
DDRSS Command Address
D10
DDR1_CA5
IO
DDRSS Command Address
C9
DDR1_CAL0(1)
A
IO Pad Calibration Resistor
E8
DDR1_CKE0
IO
DDRSS Clock Enable
B9
DDR1_CKE1
IO
DDRSS Clock Enable
D9
DDR1_CSn0_0
IO
DDRSS Chip Select
F9
DDR1_CSn0_1
IO
DDRSS Chip Select
F8
DDR1_CSn1_0
IO
DDRSS Chip Select
F11
DDR1_CSn1_1
IO
DDRSS Chip Select
F10
DDR1_DM0
IO
DDRSS Data Mask
D16
DDR1_DM1
IO
DDRSS Data Mask
E13
DDR1_DM2
IO
DDRSS Data Mask
F7
DDR1_DM3
IO
DDRSS Data Mask
B3
DDR1_DQ0
IO
DDRSS Data
B18
DDR1_DQ1
IO
DDRSS Data
E17
DDR1_DQ2
IO
DDRSS Data
D18
DDR1_DQ3
IO
DDRSS Data
A17
DDR1_DQ4
IO
DDRSS Data
E15
DDR1_DQ5
IO
DDRSS Data
B16
DDR1_DQ6
IO
DDRSS Data
C15
DDR1_DQ7
IO
DDRSS Data
C17
DDR1_DQ8
IO
DDRSS Data
B14
DDR1_DQ9
IO
DDRSS Data
D14
DDR1_DQ10
IO
DDRSS Data
C13
DDR1_DQ11
IO
DDRSS Data
C11
DDR1_DQ12
IO
DDRSS Data
E11
DDR1_DQ13
IO
DDRSS Data
A11
DDR1_DQ14
IO
DDRSS Data
B12
DDR1_DQ15
IO
DDRSS Data
D12
DDR1_DQ16
IO
DDRSS Data
B7
DDR1_DQ17
IO
DDRSS Data
D7
www.ti.com
TDA4VE-Q1, TDA4AL-Q1, TDA4VL-Q1
SPRSP62 – DECEMBER 2022
Copyright © 2023 Texas Instruments Incorporated
Submit Document Feedback
61
Product Folder Links: TDA4VE-Q1 TDA4AL-Q1 TDA4VL-Q1



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com