Filterless High Efficiency

Class-D Stereo Audio Amplifier

SSM2302

Rev. 0

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FEATURES

Filterless Class-D amplifier with built-in output stage

1.4 W into 8 Ω at 5.0 V supply with less than 1% THD

85% efficiency at 5.0 V, 1.4 W into 8 Ω speaker

Better than 98 dB SNR (signal-to-noise ratio)

Single-supply operation from 2.5 V to 5.0 V

20 nA ultralow shutdown current

Short-circuit and thermal protection

Available in 16-lead, 3 mm × 3 mm LFCSP

Pop-and-click suppression

Built-in resistors reduce board component count

Fixed and user-adjustable gain configurations

APPLICATIONS

Mobile phones

MP3 players

Portable gaming

Portable electronics

Educational toys

GENERAL DESCRIPTION

The SSM2302 is a fully integrated, high efficiency, Class-D stereo

audio amplifier. It is designed to maximize performance for

mobile phone applications. The application circuit requires a

minimum of external components and operates from a single

2.5 V to 5.0 V supply. It is capable of delivering 1.4 W of con-

tinuous output power with less than 1% THD + N driving an

8 Ω load from a 5.0 V supply.

The SSM2302 features a high efficiency, low noise modulation

scheme. It operates with 85% efficiency at 1.4 W into 8 Ω from a

5.0 V supply and has a signal-to-noise ratio (SNR) that is better

than 98 dB. PDM modulation is used to provide lower EMI-

radiated emissions compared with other Class-D architectures.

The SSM2302 has a micropower shutdown mode with a typical

shutdown current of 20 nA. Shutdown is enabled by applying a

logic low to the SD pin.

The architecture of the device allows it to achieve a very low level

of pop and click. This minimizes voltage glitches at the output

during turn-on and turn-off, thus reducing audible noise on

activation and deactivation.

The fully differential input of the SSM2302 provides excellent

rejection of common-mode noise on the input. Input coupling

capacitors can be omitted if the dc input common-mode voltage

The SSM2302 also has excellent rejection of power supply noise,

including noise caused by GSM transmission bursts and RF

rectification. PSRR is typically 63 dB at 217 Hz.

The gain can be set to 6 dB or 12 dB utilizing the gain control

also be adjusted externally by using an external resistor.

The SSM2302 is specified over the commercial temperature range

(−40°C to +85°C). It has built-in thermal shutdown and output

short-circuit protection. It is available in a 16-lead, 3 mm × 3 mm

lead-frame chip scale package (LFCSP).

FUNCTIONAL BLOCK DIAGRAM

GAIN

CONTROL

FET

DRIVER

MODULATOR

0.1µF

VDD

VDD

GND

GND

INTERNAL

OSCILLATOR

OUTR+

OUTR–

OUTL+

OUTL–

GAIN

CONTROL

BIAS

FET

DRIVER

MODULATOR

INR+

VBATT

2.5V TO 5.0V

INR–

GAIN

SD

GAIN

SHUTDOWN

INL+

INL–

10µF

LEFT IN+

LEFT IN–

RIGHT IN–

RIGHT IN+

SSM2302

Figure 1.