UPSD3422_V01 datasheet(32/300 Pages) STMICROELECTRONICS

32 / 300 page

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Memory organization

UPSD3422, UPSD3433, UPSD3434, UPSD3454

32/300

4.2.1

Program memory

External program memory is addressed by the 8032 using its 16-bit program counter (PC)

and is accessed with the 8032 signal, PSEN. Program memory can be present at any

address in program space between 0000h and FFFFh.

After a power-up or reset, the 8032 begins program execution from location 0000h where

the reset vector is stored, causing a jump to an initialization routine in firmware. At address

0003h, just following the reset vector are the interrupt service locations. Each interrupt is

assigned a fixed interrupt service location in program memory. An interrupt causes the 8032

to jump to that service location, where it commences execution of the service routine.

External Interrupt 0 (EXINT0), for example, is assigned to service location 0003h. If EXINT0

is going to be used, its service routine must begin at location 0003h. Interrupt service

locations are spaced at 8-byte intervals: 0003h for EXINT0, 000Bh for Timer 0, 0013h for

EXINT1, and so forth. If an interrupt service routine is short enough, it can reside entirely

within the 8-byte interval. Longer service routines can use a jump instruction to somewhere

else in program memory.

4.2.2

Data memory

External data is referred to as XDATA and is addressed by the 8032 using Indirect

Addressing via its 16-bit data pointer register (DPTR) and is accessed by the 8032 signals,

RD and WR. XDATA can be present at any address in data space between 0000h and

FFFFh.

Note:

The UPSD34xx has dual data pointers (source and destination) making XDATA transfers

much more efficient.

4.2.3

Memory placement

PSD module architecture allows the placement of its external memories into different

combinations of program memory and data memory spaces. This means the main Flash,

the secondary Flash, and the SRAM can be viewed by the 8032 MCU in various

combinations of program memory or data memory as defined by PSDsoft Express.

As an example of this flexibility, for applications that require a great deal of Flash memory in

data space (large lookup tables or extended data recording), the larger main Flash memory

can be placed in data space and the smaller secondary Flash memory can be placed in

program space. The opposite can be realized for a different application if more Flash

memory is needed for code and less Flash memory for data.

By default, the SRAM and csiop memories on the PSD module must always reside in data

memory space and they are treated by the 8032 as XDATA.

The main Flash and secondary Flash memories may reside in program space, data space,

or both. These memory placement choices specified by PSDsoft Express are programmed

into non-volatile sections of the UPSD34xx, and are active at power-up and after reset. It is

possible to override these initial settings during runtime for In-Application Programming

(IAP).

Standard 8032 MCU architecture cannot write to its own program memory space to prevent

accidental corruption of firmware. However, this becomes an obstacle in typical 8032

systems when a remote update to firmware in Flash memory is required using IAP. The PSD

module provides a solution for remote updates by allowing 8032 firmware to temporarily

“reclassify” Flash memory to reside in data space during a remote update, then returning

Flash memory back to program space when finished. See the VM register (Table 160 on

page 203) in the PSD module section of this document for more details.

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