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VIPER11 数据表(PDF) 17 Page - STMicroelectronics |
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VIPER11 数据表(HTML) 17 Page - STMicroelectronics |
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17 / 37 page ![]() DS11873 Rev 5 17/37 VIPer11 General description 37 5.3 Primary MOSFET The primary switch is implemented with an avalanche-rugged N-channel MOSFET with minimum breakdown voltage 800 V, VBVDSS, and maximum on-resistance of 20 , RDS(on). The sense-FET is embedded and it allows a virtually lossless current sensing. The MOSFET gate driver controls the gate current during both turn-on and turn-off in order to minimize EMI. Under UVLO conditions the embedded pull-down circuit holds the gate low in order to ensure that the MOSFET cannot be turned on accidentally. 5.4 High voltage startup The embedded high voltage startup includes both the 800V-rated auxiliary N-channel power MOSFET, whose gate is biased through the resistor RG, and the switchable HV current source, delivering the current IHV. The major portion of IHV, (ICH), charges the capacitor connected to VCC. A minor portion is sunk by the controller block. At startup, as the voltage across the DRAIN pin exceeds the VHV_START threshold, the HV current source is turned on, charging linearly the CS capacitor. At the very beginning of the startup, when Cs is fully discharged, the charging current is low, ICH1, in order to avoid IC damaging in case VCC is accidentally shorted to GND. As VCC exceeds 1 V, ICH is increased to ICH2 in order to speed up the charging of CS. As VCC reaches the start-up threshold VCCon the chip starts operating, the primary MOSFET is enabled to switch, the HV current source is disabled and the device is powered by the energy stored in the CS capacitor. In steady-state the IC can be supplied from the output (in case of non-isolated topologies) or through an auxiliary winding (in case of isolated topologies), as shown in Figure 26. Figure 26. IC supply modes |
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