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数据搜索系统，热门电子元器件搜索 |
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LIS2DUX12TR 数据表(PDF) 7 Page - STMicroelectronics |
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LIS2DUX12TR 数据表(HTML) 7 Page - STMicroelectronics |
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7 / 102 page  2.4 Communication interface characteristics 2.4.1 SPI - serial peripheral interface Subject to general operating conditions for Vdd and Top. Table 5. SPI slave timing values Symbol Parameter Value(1) Unit Min Typ Max fc(SPC) SPI clock frequency 10 MHz tc(SPC) SPI clock period 100 ns thigh(SPC) SPI clock high 45 tlow(SPC) SPI clock low 45 tsu(CS) CS setup time (mode 3) 5 CS setup time (mode 0) 20 th(CS) CS hold time (mode 3) 20 CS hold time (mode 0) 20 tsu(SI) SDI input setup time 5 th(SI) SDI input hold time 15 tv(SO) SDO valid output time 15 25 tdis(SO) SDO output disable time 50 Cload Bus capacitance 100 pF 1. Values are evaluated at 10 MHz clock frequency for SPI with both 4 and 3 wires, based on characterization results, not tested in production Figure 3. SPI slave timing in mode 0 CS SPC SDI SDO MSB OUT MSB IN LSB OUT LSB IN t t t tlow(SPC) v(SO) tc(SPC) thigh(SPC) tsu(CS) th(SI) tsu(SI) dis(SO) h(CS) LIS2DUX12 Communication interface characteristics DS14071 - Rev 2 page 7/102 |
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