LIS2DUX12TR datasheet(4/102 Pages) STMICROELECTRONICS

4 / 102 page

1.2

Pin description

Figure 2. Pin connections

GND

RES

SCL/SPC

SDO/SA0

SDA/SDI/SDO

(TOPVIEW)

DIRECTION OF THE

DETECTABLE

ACCELERATIONS

Vdd

(BOTTOM VIEW)

Vdd_IO

Table 1. Pin description

Pin#

Name

Function

SCL

SPC

I²C/MIPI I3C® serial clock (SCL)

SPI serial port clock (SPC)

2(1)

SPI/I²C/MIPI I3C® mode selection

(1: SPI idle mode / I²C/MIPI I3C® enabled;

0: SPI enabled / I²C/MIPI I3C® disabled)

3(2)

SDO

SA0

SPI serial data output (SDO)

I²C less significant bit of the device address (SA0)

4(2)

SDA

SDI

SDO

I²C/MIPI I3C® serial data (SDA)

SPI serial data input (SDI)

3-wire interface serial data output (SDO)

Internally not connected. Can be tied to Vdd, Vdd_IO, or GND.

GND

0 V supply

RES

Connect to GND if not used as interrupt pin 1(3)

GND

0 V supply

Vdd

Power supply

Vdd_IO

Power supply for I/O pins

11(4)

INT2

Interrupt pin 2. Clock input when selected in one-shot mode

12(4)

INT1

Interrupt pin 1

1. The CS pin is internally pulled up by default. The pull-up of the CS pin can be disconnected by setting the bit CS_PU_DIS of

2. The internal pull-up of the SDO/SA0 and SDA/SDI/SDO pins is disconnected by default. The pull-up of the SDO/SA0 pin

can be enabled by setting bit SDO_PU_EN of register PIN_CTRL (0Ch) to 1. The pull-up of the SDA/SDI/SDO pin can be

enabled by setting bit SDA_PU_EN of register PIN_CTRL (0Ch) to 1.

3. When the INT1_ON_RES bit of register CTRL1 (10h) is set to 1, the interrupt signals configured on the INT1 pin are routed

to the RES pin.

4. The INT1 and INT2 pins are internally pulled down by default. The internal pull-down of the INT1 pin can be disconnected by

setting the PD_DIS_INT1 bit in PIN_CTRL (0Ch) to 1. The internal pull-down of the INT2 pin can be disconnected by setting

the PD_DIS_INT2 bit in PIN_CTRL (0Ch) to 1.

LIS2DUX12

Pin description

DS14071 - Rev 2

page 4/102

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