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LIS2DUX12TR 数据表(PDF) 40 Page - STMicroelectronics |
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LIS2DUX12TR 数据表(HTML) 40 Page - STMicroelectronics |
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40 / 102 page ![]() 8.8 CTRL5 (14h) R/W Table 33. CTRL5 register ODR3 ODR2 ODR1 ODR0 BW1 BW0 FS1 FS0 Table 34. CTRL5 register description ODR[3:0] ODR selection, see Table 35. BW[1:0] Selects the device bandwidth, which is dependent on the ODR selected. In high-performance mode (all ODR values) and in low-power mode for ODR ≥50 Hz, the available bandwidths are: ODR/2 (BW[1:0] = 00); ODR/4 (BW[1:0] = 01); ODR/8 (BW[1:0] = 10); ODR/16 (BW[1:0] = 11). In low-power mode for ODR < 50 Hz, refer to Table 36. FS[1:0] Sets the full scale, see Table 37. Table 35. Operating modes ODR[3:0] Operating mode 0000 Power-down 0001 1.6 Hz in ultralow-power 0010 3 Hz in ultralow-power 0011 25 Hz in ultralow-power 0100 6 Hz 0101 12.5 Hz 0110 25 Hz 0111 50 Hz 1000 100 Hz 1001 200 Hz 1010 400 Hz 1011 800 Hz 1110 One-shot using the INT2 pin 1111 One-shot using the interface LIS2DUX12 CTRL5 (14h) DS14071 - Rev 2 page 40/102 |
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