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M95256-R 数据表(PDF) 32 Page - STMicroelectronics

部件名 M95256-R
功能描述  256-Kbit serial SPI bus EEPROM with high-speed clock
PDF  51 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

M95256-R 数据表(HTML) 32 Page - STMicroelectronics

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Table 19. AC characteristics
Test conditions specified either in Table 9, in Table 10 or in Table 11 and in Table 12
Symbol
Alt.
Parameter
1.7 V ≤ VCC < 2.5 V 2.5 V ≤ VCC < 4.5 V VCC ≥ 4.5V
Unit
Min.
Max.
Min.
Max.
Min. Max.
fC
fSCK Clock frequency
-
5
-
10
-
20
MHz
tSLCH
tCSS1 S active setup time
60
-
30
-
15
-
ns
tSHCH
tCSS2 S not active setup time
60
-
30
-
15
-
ns
tSHSL
tCS
S deselect time
90
-
40
-
20
-
ns
tCHSH
tCSH S active hold time
60
-
30
-
15
-
ns
tCHSL
-
S not active hold time
60
-
30
-
15
-
ns
tCH(1)
tCLH Clock high time
80
-
40
-
20
-
ns
tCL(1)
tCLL Clock low time
80
-
40
-
20
-
ns
tCLCH(2)
tRC
Clock rise time
-
2
-
2
-
2
µs
tCHCL(2)
tFC
Clock fall time
-
2
-
2
-
2
µs
tDVCH
tDSU Data in setup time
20
-
10
-
5
-
ns
tCHDX
tDH
Data in hold time
20
-
10
-
10
-
ns
tHHCH
-
Clock low hold time after HOLD not active
60
-
30
-
15
-
ns
tHLCH
-
Clock low hold time after HOLD active
60
-
30
-
15
-
ns
tCLHL
-
Clock low setup time before HOLD active
0
-
0
-
0
-
ns
tCLHH
-
Clock low setup time before HOLD not active
0
-
0
-
0
-
ns
tSHQZ(2)
tDIS Output disable time
-
80
-
40
-
20
ns
tCLQV
tV
Clock low to output valid
-
80
-
40
-
20
ns
tCLQX
tHO Output hold time
0
-
0
-
0
-
ns
tQLQH(2)
tRO Output rise time
-
20
-
20
-
10
ns
tQHQL(2)
tFO
Output fall time
-
20
-
20
-
10
ns
tHHQV
tLZ
HOLD high to output valid
-
80
-
40
-
20
ns
tHLQZ(2)
tHZ
HOLD low to output High-Z
-
80
-
40
-
20
ns
tW
tWC Write time
-
5
-
5
-
5
ms
1. tCH + tCL must never be less than the shortest possible clock period, 1 / fC(max).
2. Evaluated By Characterization - Not tested in production.
M95256-W M95256-R M95256-DF
DC and AC parameters
DS4712 - Rev 22
page 32/51



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