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STPM066S 数据表(PDF) 21 Page - STMicroelectronics |
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STPM066S 数据表(HTML) 21 Page - STMicroelectronics |
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21 / 67 page ![]() Figure 9. Watchdog timing if WD_REC_en = 1 T EFW T EFW T SW T EFW T SW T EFW T SW T RSTA T RSTA T LW T LW T LW 0 RESET-B WD- trigger Normal operation Time / ms Time / ms Trigger signal write early trigger Missing = missing trigger = early trigger timing = correct trigger timing Normal startup operation and timeout failures T = restart time from REC to INIT then to ACTIVE RSTA T = safe trigger window SW T = early failure window EFW T = long open window LW GADG1105181220PS-1 T DWR + T DWR Figure 10. Watchdog timing if WD_REC_en = 0 T EFW T EFW T SW T EFW T SW T EFW T RSTT T RSTT T LW T LW T LW 0 RESET-B WD- trigger Normal operation Time / ms Time / ms Trigger signal write early trigger Missing = missing trigger = early trigger timing = correct trigger timing Normal startup operation and timeout failures T = restart time longer than 1.5 µs RSTT T = safe trigger window SW T = early failure window EFW T = long open window LW GADG1405181212PS-1 T SW T DWR + T DWR STPM066S Voltage regulators and features description DS12976 - Rev 2 page 21/67 |
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