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STM8AF/P6346 数据表(PDF) 7 Page - STMicroelectronics

部件名 STM8AF/P6346
功能描述  Automotive 8-bit MCU, with up to 32-Kbyte Flash memory, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V
PDF  95 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

STM8AF/P6346 数据表(HTML) 7 Page - STMicroelectronics

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DS12343 Rev 2
7/95
STM8AF6366
List of figures
8
List of figures
Figure 1.
STM8AF6366 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 2.
Flash memory organization of STM8AF6366 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 3.
VFQFPN/LQFP 32-pin pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Figure 4.
LQFP 48-pin pinout. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Figure 5.
Register and memory map of STM8A products . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Figure 6.
Pin loading conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
Figure 7.
Pin input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
Figure 8.
fCPUmax versus VDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
Figure 9.
External capacitor CEXT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
Figure 10.
Typ. IDD(RUN)HSE vs. VDD @fCPU = 16 MHz, peripheral = on . . . . . . . . . . . . . . . . . . . . . . . 56
Figure 11.
Typ. IDD(RUN)HSE vs. fCPU @ VDD = 5.0 V, peripheral = on . . . . . . . . . . . . . . . . . . . . . . . . 56
Figure 12.
Typ. IDD(RUN)HSI vs. VDD @ fCPU = 16 MHz, peripheral = off . . . . . . . . . . . . . . . . . . . . . . . 57
Figure 13.
Typ. IDD(WFI)HSE vs. VDD @ fCPU = 16 MHz, peripheral = on . . . . . . . . . . . . . . . . . . . . . . . 57
Figure 14.
Typ. IDD(WFI)HSE vs. fCPU @ VDD = 5.0 V, peripheral = on . . . . . . . . . . . . . . . . . . . . . . . . . 57
Figure 15.
Typ. IDD(WFI)HSI vs. VDD @ fCPU = 16 MHz, peripheral = off . . . . . . . . . . . . . . . . . . . . . . . 57
Figure 16.
HSE external clock source . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
Figure 17.
HSE oscillator circuit diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
Figure 18.
Typical HSI frequency vs VDD. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
Figure 19.
Typical LSI frequency vs VDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
Figure 20.
Typical VIL and VIH vs VDD @ four temperatures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
Figure 21.
Typical pull-up resistance RPU vs VDD @ four temperatures . . . . . . . . . . . . . . . . . . . . . . . 64
Figure 22.
Typical pull-up current Ipu vs VDD @ four temperatures . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
Figure 23.
Typ. VOL @ VDD = 3.3 V (standard ports). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
Figure 24.
Typ. VOL @ VDD = 5.0 V (standard ports). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
Figure 25.
Typ. VOL @ VDD = 3.3 V (true open drain ports) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
Figure 26.
Typ. VOL @ VDD = 5.0 V (true open drain ports) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
Figure 27.
Typ. VOL @ VDD = 3.3 V (high sink ports) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
Figure 28.
Typ. VOL @ VDD = 5.0 V (high sink ports) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
Figure 29.
Typ. VDD - VOH @ VDD = 3.3 V (standard ports). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
Figure 30.
Typ. VDD - VOH @ VDD = 5.0 V (standard ports). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
Figure 31.
Typ. VDD - VOH @ VDD = 3.3 V (high sink ports) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
Figure 32.
Typ. VDD - VOH @ VDD = 5.0 V (high sink ports) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
Figure 33.
Typical NRST VIL and VIH vs VDD @ four temperatures . . . . . . . . . . . . . . . . . . . . . . . . . . 67
Figure 34.
Typical NRST pull-up resistance RPU vs VDD. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
Figure 35.
Typical NRST pull-up current Ipu vs VDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
Figure 36.
Recommended reset pin protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
Figure 37.
SPI timing diagram where slave mode and CPHA = 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
Figure 38.
SPI timing diagram where slave mode and CPHA = 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
Figure 39.
SPI timing diagram - master mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
Figure 40.
Typical application with ADC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
Figure 41.
ADC accuracy characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
Figure 42.
VFQFPN32 - 32-pin, 5x5 mm, 0.5 mm pitch very thin profile fine pitch quad
flat package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
Figure 43.
VFQFPN32 - 32-pin, 5x5 mm, 0.5 mm pitch very thin profile fine pitch quad
flat package recommended footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
Figure 44.
VFQFPN32 marking example (package top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
Figure 45.
LQFP48 - 48-pin, 7 x 7 mm low-profile quad flat package outline . . . . . . . . . . . . . . . . . . . 82
Figure 46.
LQFP48 - 48-pin, 7 x 7 mm low-profile quad flat package



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