STM8AFSLASHP6369 datasheet(63/116 Pages) STMICROELECTRONICS

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STM8AF6388

Electrical characteristics

114

10.3.1

VCAP external capacitor

Stabilization for the main regulator is achieved connecting an external capacitor CEXT to the

VCAP pin. CEXT is specified in Table 22. Care should be taken to limit the series inductance

to less than 15 nH.

Figure 12. External capacitor CEXT

1. Legend: ESR is the equivalent series resistance and ESL is the equivalent inductance.

10.3.2

Supply current characteristics

The current consumption is measured as described in Figure 9 on page 59 and Figure 10

on page 60.

If not explicitly stated, general conditions of temperature and voltage apply.

Table 23. Operating conditions at power-up/power-down

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

tVDD

VDD rise time rate

2(1)

1. Guaranteed by design, not tested in production.

µs/V

VDD fall time rate

2(1)

tTEMP

Reset release delay

VDD rising

1.7

Reset generation delay

VDD falling

µs

VIT+

Power-on reset

threshold(2) (3)

2. If VDD is below 3 V, the code execution is guaranteed above the VIT- and VIT+ thresholds. RAM content is

kept. The EEPROM programming sequence must not be initiated.

3. There is inrush current into VDD present after device power on to charge CEXT capacitor. This inrush

energy depends from CEXT capacitor value. For example, a CEXT of 1 μF requires Q=1 μF x 1.8 V =

1.8 μC.

2.65

2.8

2.95

VIT-

Brown-out reset

threshold

2.58

2.73

2.88

VHYS(BOR)

Brown-out reset

hysteresis

70(1)

-mV

MSv36488V1

ESR

RLeak

ESL

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