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STM32G0C1NET7XTR 数据表(PDF) 118 Page - STMicroelectronics |
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STM32G0C1NET7XTR 数据表(HTML) 118 Page - STMicroelectronics |
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118 / 159 page  Electrical characteristics STM32G0C1xC/xE 118/159 DS13564 Rev 4 Table 75. SPI characteristics(1) Symbol Parameter Conditions Min Typ Max Unit fSCK 1/tc(SCK) SPI clock frequency Master mode 1.65 < VDD < 3.6 V Range 1 -- 32 MHz Master transmitter 1.65 < VDD < 3.6 V Range 1 32 Slave receiver 1.65 < VDD < 3.6 V Range 1 32 Slave transmitter/full duplex 2.7 < VDD < 3.6 V Range 1 32 Slave transmitter/full duplex 1.65 < VDD < 3.6 V Range 1 23 1.65 < VDD < 3.6 V Range 2 8 tsu(NSS) NSS setup time Slave mode, SPI prescaler = 2 4 ₓ TPCLK -- ns th(NSS) NSS hold time Slave mode, SPI prescaler = 2 2 ₓ TPCLK -- ns tw(SCKH) SCK high time Master mode TPCLK - 1.5 TPCLK TPCLK + 1.5 ns tw(SCKL) SCK low time Master mode TPCLK - 1.5 TPCLK TPCLK + 1.5 ns tsu(MI) Master data input setup time -1 - - ns tsu(SI) Slave data input setup time -1 - - ns th(MI) Master data input hold time -5 - - ns th(SI) Slave data input hold time -1 - - ns ta(SO) Data output access time Slave mode 9 - 34 ns tdis(SO) Data output disable time Slave mode 9 - 16 ns tv(SO) Slave data output valid time 2.7 < VDD < 3.6 V Range 1 -9 14 ns 1.65 < VDD < 3.6 V Range 1 -9 21 1.65 < VDD < 3.6 V Voltage Range 2 -11 24 tv(MO) Master data output valid time -- 3 5 ns |
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