STM32G0C1NET6X datasheet(96/159 Pages) STMICROELECTRONICS

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Electrical characteristics

STM32G0C1xC/xE

96/159

DS13564 Rev 4

All I/Os are CMOS- and TTL-compliant (no software configuration required). Their

characteristics cover more than the strict CMOS-technology or TTL parameters, as shown

in Figure 24.

Figure 24. I/O input characteristics

Characteristics of FT_e I/Os

The following table and figure specify input characteristics of FT_e I/Os.

4. This value represents the pad leakage of the I/O itself. The total product pad leakage is provided by this formula:

ITotal_Ileak_max = 10 µA + [number of I/Os where VIN is applied on the pad] ₓ Ilkg(Max).

5. Pull-up and pull-down resistors are designed with a true resistance in series with a switchable PMOS/NMOS. This

PMOS/NMOS contribution to the series resistance is minimal (~10% order).

MSv47925V1

1.6

1.8

2.0

2.2

2.4

2.6

2.8

3.0

3.2

3.4

3.6

0.5

1.5

2.5

Minimum required

logic level 1 zone

Minimum required

logic level 0 zone

VIHmin

= 0.7

VDDIO

(CMOS

standard

requirement)

VILmax = 0.3

VDDIO

(CMOS standard

requirement)

Undefined input range

VIHmin =

0.49 VDDIO

+ 0.26

VILmax = 0.39

VDDIO - 0.06

VIN (V)

VDDIO (V)

TTL standard requirement

Device characteristics

Test thresholds

Table 56. Input characteristics of FT_e I/Os

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

IINJ

Injected current on pin

VDDIO1-VIN

Voltage over VDDIO1

IINJ = 5 mA

Diode dynamic serial resistor

IINJ = 5 mA

300

Ω

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