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TSC211 数据表(PDF) 17 Page - STMicroelectronics

部件名 TSC211
功能描述  High/low-side, bidirectional, zero-drift current sense amplifiers
PDF  38 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

TSC211 数据表(HTML) 17 Page - STMicroelectronics

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Vio Error= ±Vio±Dvio/Dt*Gain
(3)
The TSC21x series have a zero drift architecture allowing to present very small input offset and also an extremely
low variation in temperature.
Gain error and shunt resistance accuracy
Gain error=Gain1+εgain
(4)
Rsense error=Gain1+εRsense
(5)
where
εgainisthegainerror1%max.fortheTSC21x.
Where
εRsense    istheshuntresistanceerror.Shuntresistorsfrom5mΩto100mΩareavailablewith1%
accuracy or better.
CMR error
In the electrical characteristics CMR is specified at one input common mode voltage. So in order to take into
consideration the variation of the input voltage offset depending on the Vicm, the calculus must be done till this
known point. Vicm = 12 V is the reference point.
So the error on Vout due to a common mode voltage variation can be written as in equation 6:
CMR error=±Vicm−12V
CMR *Gain
(6)
Noise
One of the other advantages of the zero-drift architecture, is to reject the low frequency noise over the bandwidth,
and allow to have a white noise on all the bandwidth of the current sensing.
This is a real added value for the precision measurement especially in DC environment. Figure 20 express the
noise referred to the input of the TSC210. The TSC213 has white noise density of 38 nV/√Hz, on its whole
bandwidth.
The RMS value of the output noise of the TSC213 is the integration of the spectral noise over the bandwidth of
interest and can be expressed as equation 7:
enRMS= ∫0.1100000.π2 38.10−92 df *Gain
(7)
Total output voltage
The maximum total error that might happen on the output of the device in worst case condition can be described
as the sum of the different source described just above. The total output voltage can be written as equation (8).
Vout=G1+εG+dGdT*∆T . Rsℎunt 1+εsℎunt . Isense + Vio+ dViodT*∆T +
Vicm−12V
CMRR +noise
(8)
Note that the input bias currents are not considered in this section, as it has been already integrated in the Vsense.
Figure 35 below depicts the current flowing from the source to the load when the input common mode voltage is
higher than 2.5 V.
TSC210, TSC211, TSC212, TSC213, TSC214, TSC215
Error calculation
DS13237 - Rev 6
page 17/38



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