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9SQL4958CNDGI 数据表(PDF) 7 Page - Renesas Technology Corp

部件名 9SQL4958CNDGI
功能描述  3.3V PCIe® Gen1–5 and UPI Clock Generator Family
PDF  30 Pages
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制造商  RENESAS [Renesas Technology Corp]
网页  http://www.renesas.com
标志 RENESAS - Renesas Technology Corp

9SQL4958CNDGI 数据表(HTML) 7 Page - Renesas Technology Corp

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©2020 Renesas Electronics Corporation
February 19, 2020
9SQL4952/9SQL4954/9SQL4958 Datasheet
If SRnS mode is desired, power up with ^vSS_EN_tri = '0'. Do not attempt to switch to the other modes via SMBus control in Byte 1 or a
system reset will be required. If Common Clock (CC) or SRIS mode is desired, power up with ^vSS_EN_tri at either 'M' or '1'. The desired
spread spectrum amount can then be selected via Byte 1 without a requiring a system reset. Once 'M' or '1' is latched at power up, do not
attempt to enter SRnS mode or a system reset will be required.
vOE1#
Input
Active low input for enabling output 1. This pin has an internal pull-down.
1 = disable output, 0 = enable output.
17
17
19
vOE2#
Input
Active low input for enabling output 2. This pin has an internal pull-down.
1 = disable output, 0 = enable output.
25
24
vOE3#
Input
Active low input for enabling output 3. This pin has an internal pull-down.
1 = disable output, 0 = enable output.
28
29
vOE4#
Input
Active low input for enabling output 4. This pin has an internal pull-down.
1 = disable output, 0 = enable output.
34
vOE5#
Input
Active low input for enabling output 5. This pin has an internal pull-down.
1 = disable output, 0 = enable output.
37
vOE6#
Input
Active low input for enabling output 6. This pin has an internal pull-down.
1 = disable output, 0 = enable output.
43
vOE7#
Input
Active low input for enabling output 7. This pin has an internal pull-down.
1 = disable output, 0 = enable output.
46
vSADR/REF3.3
Latched
I/O
Latch to select SMBus Address/3.3V LVCMOS copy of X1/REFIN pin
7
6
4
X2
Output
Crystal output.
4
3
2
XIN/CLKIN_25
Input
Crystal input or Reference Clock input. nominally 25MHz.
3
2
1
Table 2. Spread Selection
^vSS_EN_tri Pin
B1[4:3]
Spread%
Note
0
00
0
PCIe SRNS mode.
01
-0.25
PCIe Common Clock or SRIS mode.
M (VDD/2)
10
0
PCIe Common Clock or SRIS mode.
1
11
-0.50
PCIe Common Clock or SRIS mode.
Table 1. Pin Descriptions (Cont.)
Name
Type
Description
9SQL4958
Pin No.
9SQL4954
Pin No.
9SQL4952
Pin No.



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