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FS32R274VCK2MMM 数据表(PDF) 28 Page - NXP Semiconductors |
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FS32R274VCK2MMM 数据表(HTML) 28 Page - NXP Semiconductors |
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28 / 78 page ![]() 6.1.3 16 MHz Internal RC Oscillator (IRCOSC) electrical specifications Table 22. Internal RC Oscillator electrical specifications Symbol Parameter Conditions Min Typ Max Unit FTarget IRC target frequency — — 16 — MHz Funtrimmed IRC frequency (untrimmed) — 9.6 — 24 MHz δFvar IRC trimmed frequency variation 1 — -8 — 8 % Tstartup Startup time — — 5 µs 1. The typical user trim step size ( δfTRIM) is 0.3% of current frequency for application of positive trim and 0.26% of current frequency for application of negative trim, based on characterization results. 6.1.4 320 MHz AFE PLL electrical characteristics Table 23. 320 MHz AFE PLL parameters Symbol Parameter Conditions Min Typ Max Unit PLLfout Output Frequency — — 320 — MHz PLLfin Input Frequency — — — 40 MHz tcal Calibration Time 1 LW64 = 1 LW64 = 0 — — 150 500 µs tlock Lock Time after calibration — — 75 µs tjitcck Cycle to cycle jitter (peak – peak) — — — 10 ps — Output duty cycle — 48 50 52 % 1. The LW64 bit sets the wait time before the PLL frequency is measured after each calibration step to allow for stabilization. If LW64 is '0', wait time of 256 reference clock cycles is used. If LW64 is'1', wait time of 64 reference clock cycles is used. 6.1.5 LFAST PLL electrical characteristics The specifications in the following table apply to the interprocessor bus LFAST interface. Table 24. LFAST PLL electrical characteristics Symbol Parameter Condition Min Typ Max Unit fRF_REF PLL reference clock frequency — 10 — 26 MHz ERRREF PLL reference clock frequency error — –1 — 1 % DCREF PLL reference clock duty cycle — 45 — 55 % fVCO PLL VCO frequency — — 6401 — MHz tLOCK PLL phase lock2 — — — 40 μs ΔPERREF Input reference clock jitter (peak to peak) Single period, fRF_REF = 10 MHz — — 300 ps Table continues on the next page... Clocks and PLL Specifications S32R274/S32R264 Series Data Sheet, Rev. 6, 06/2021 28 NXP Semiconductors |
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