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AT45DB321E 数据表(PDF) 13 Page - Renesas Technology Corp |
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AT45DB321E 数据表(HTML) 13 Page - Renesas Technology Corp |
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13 / 69 page ![]() 13 AT45DB321E 8784M–DFLASH–02/2022 The device also incorporates an intelligent erase algorithm that can detect when a byte location fails to erase properly. If an erase error arises, it will be indicated by the EPE bit in the Status Register. Table 6-1. Block Erase Addressing 6.9 Sector Erase The Sector Erase command can be used to individually erase any sector in the main memory. The main memory array is comprised of 64 sectors, and only one sector can be erased at a time. To perform an erase of Sector 0a or Sector 0b with the standard DataFlash page size (528 bytes), an opcode of 7Ch must be clocked into the device followed by three address bytes comprised of one dummy bit, 10 page address bits (PA12 - PA3), and 13 dummy bits. To perform a Sector 1-63 erase, an opcode of 7Ch must be clocked into the device followed by three address bytes comprised of one dummy bit, six page address bits (PA12 - PA7), and 17 dummy bits. To perform a Sector 0a or Sector 0b erase with the binary page size (512 bytes), an opcode of 7Ch must be clocked into the device followed by three address bytes comprised of two dummy bits, 10 page address bits (A21 - A12), and 12 dummy bits. To perform a Sector 1-63 erase, an opcode of 7Ch must be clocked into the device followed by two dummy bits, six page address bits (A21 - A16), and 16 dummy bits. The page address bits are used to specify any valid address location within the sector to be erased. When a low-to high transition occurs on the CS pin, the device will erase the selected sector. The erase operation is internally self-timed and should take place in a maximum time of t SE. During this time, the RDY/BUSY bit in the Status Register will indicate that the device is busy. The device also incorporates an intelligent algorithm that can detect when a byte location fails to erase properly. If an erase error arises, it will be indicated by the EPE bit in the Status Register. Table 6-2. Sector Erase Addressing PA12/ A21 PA11/ A20 PA10/ A19 PA9/ A18 PA8/ A17 PA7/ A16 PA6/ A15 PA5/ A14 PA4/ A13 PA3/ A12 PA2/ A11 PA1/ A10 PA0/ A9 Block 0 0 0 0 0 0 0 0 0 0 X X X 0 0 0 0 0 0 0 0 0 0 1 X X X 1 0 0 0 0 0 0 0 0 1 0 X X X 2 0 0 0 0 0 0 0 0 1 1 X X X 3 • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • 1 1 1 1 1 1 1 1 0 0 X X X 1020 1 1 1 1 1 1 1 1 0 1 X X X 1021 1 1 1 1 1 1 1 1 1 0 X X X 1022 1 1 1 1 1 1 1 1 1 1 X X X 1023 PA12/ A21 PA11/ A20 PA10/ A19 PA9/ A18 PA8/ A17 PA7/ A16 PA6/ A15 PA5/ A14 PA4/ A13 PA3/ A12 PA2/ A11 PA1/ A10 PA0/ A9 Sector 0 0 0 0 0 0 0 0 0 0 X X X 0a 0 0 0 0 0 0 0 0 0 1 X X X 0b 0 0 0 0 0 1 X X X X X X X 1 0 0 0 0 1 0 X X X X X X X 2 |
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