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ST70134 数据表(PDF) 7 Page - STMicroelectronics |
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ST70134 数据表(HTML) 7 Page - STMicroelectronics |
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7 / 22 page ![]() ST70134A 7/22 BLOCK DIAGRAM Application principle is described in Figure 4. A LP filter may be used on the TX path to reduce DMT sidelobes and out of band noise influence on the receiver. On the RX path, a HP filter must be used in order to reduce the echo signal level and to avoid saturation of the input stage of the receiver. The POTS filter is used in both directions to reduce crosstalk between ADSL signals and POTS speech and signalling. Low pass POTS fil- ter can be very simple for Lite - ADSL application (see Figure 4). RX Path Speech Filter An external bi-directional LC filter for up and downstream POTS service splits the speech sig- nal from the ADSL signal to the POTS circuits. The ADSL analog front end integrated circuit does not contain any circuitry for the POTS service but it guarantees that bandwidth is not disturbed by spurious signals from the ADSL-spectrum. Channel Filters The external analog circuits provide partial echo cancellation by an analog filtering of the transmit upstream signal. This is feasible because the upstream and the downstream data are modu- lated on separate carriers (FDM) (see Figure 4). Signal to Noise Performance RX- PATH SENSITIVITY AT MAXIMUM GAIN The RX path sensitivity at the maximal RX-AGC of the receiver is defined at -140dBm/Hz (for 100 Ω ref) on the line. This figure corresponds to the equivalent input noise of 31nVHz-1/2 seen on the line. The maximum noise density within the pass band can exceed the average value as follows: RX path (max AGC setting): <100nVHz-1/2 @ 138kHz <31nVHz-1/2 for 250kHz < f * For ADSL over ISDN, instead of SC2, HC2 1.1MHz LP filter is programmed. Figure 4 : Block Diagram VCODAC XTAL DRIVER 56 VCXOUT 60 59 35.328MHz 48 50 47 49 RXN(0:1) RXP(0:1) LP 1.1MHz HC1 13 Bits A/D Converter 7 20 12 10 9 11 LNA PD 31 32 LP 138KHz SC2 * 12 Bits D/A Converter -15.0dB TXP TXN LPF GRX 50k Ω R 2R 2R R GTX LINE DRIVER 1 2 TXn HP POTSFILTER LP POTSFILTER POTS 1.1 Line Zo = 100 Ω 4 Master Clock 35.328MHz Nibbles 17.664MHz Word 8.832/4.416MHz RXn CTRLIN RESETN 50k Ω 13 14 15 |
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