P9221-R Datasheet

© 2017 Integrated Device Technology, Inc.

3

October 10, 2017

13. Package Drawings......................................................................................................................................................................................34

14. Recommended Land Pattern......................................................................................................................................................................35

15. Special Notes: WLCSP-52 (AHG52) Package Assembly...........................................................................................................................36

16. Marking Diagram ........................................................................................................................................................................................36

17. Ordering Information...................................................................................................................................................................................36

18. Revision History..........................................................................................................................................................................................37

List of Figures

Figure 1. Pin Assignments..................................................................................................................................................................................5

Figure 2. Efficiency vs. Output Load: VOUT = 12V .............................................................................................................................................12

Figure 3. Load Reg. vs. Output Load: VOUT = 12V............................................................................................................................................12

Figure 4. Efficiency vs. Output Load: VOUT = 9V ...............................................................................................................................................12

Figure 5. Load Reg. vs. Output Load: VOUT = 9V..............................................................................................................................................12

Figure 6. Efficiency vs. Output Load: VOUT = 5V ...............................................................................................................................................12

Figure 7. Load Reg. vs. Output Load: VOUT = 5V..............................................................................................................................................12

Figure 8. Rectifier Voltage vs. Load: VOUT = 12V ..............................................................................................................................................13

Figure 9. Rectifier Voltage vs. Load: VOUT = 9V ................................................................................................................................................13

Figure 10. Rectifier Voltage vs. Load: VOUT = 5V ................................................................................................................................................13

Figure 11. Current Limit vs. VILIM ........................................................................................................................................................................13

Figure 12. X and Y Misalignment........................................................................................................................................................................13

Figure 13. Max. Power vs. Misalignment: VOUT=12V..........................................................................................................................................13

Figure 14. Enable Startup: VOUT = 12V; IOUT = 1.2A ............................................................................................................................................14

Figure 15. Transient Resp: VOUT = 12V; IOUT = 0 to 1.2A ....................................................................................................................................14

Figure 16. Transient Resp: VOUT = 12V; IOUT = 1.3A to 0 ....................................................................................................................................14

Figure 17. Functional Block Diagram..................................................................................................................................................................15

Figure 18. Example of Differential Bi-phase Decoding for FSK..........................................................................................................................21

Figure 19. Example of Asynchronous Serial Byte Format for FSK.....................................................................................................................21

Figure 20. Bit Encoding Scheme ........................................................................................................................................................................22

Figure 21. Byte Encoding Scheme .....................................................................................................................................................................22

Figure 22. Communication Packet Structure ......................................................................................................................................................22

Figure 23. WPC Power Transfer Phases Flowchart ...........................................................................................................................................23

Figure 24. Typical Application Schematic – P9221-R Evaluation Board Revision 2.2........................................................................................31

Figure 25. Package Outline Drawing (AHG52)...................................................................................................................................................34

Figure 26. 52-WLCSP (AHG52) Land Pattern....................................................................................................................................................35