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FS6407 数据表(PDF) 65 Page - NXP Semiconductors |
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FS6407 数据表(HTML) 65 Page - NXP Semiconductors |
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65 / 111 page ![]() NXP Semiconductors 65 FS6407/FS6408 7.2.2 Secured SPI command Some SPI commands must be secured to avoid unwanted change of the critical bits. In the fail-safe machine and in the main state machine, the secured bits are calculated from the data bits sent as follows: • Secure 3 = NOT(Bit5) • Secure 2 = NOT(Bit4) • Secure 1 = Bit7 • Secure 0 = Bit6 INIT FSSM#2 1 00101 #37(25h) Write during INIT phase then Read only Table 69 WD_Window 1 00110 #38(26h) Write (No restriction) and Read Table 71 WD_LFSR 1 00111 #39(27h) Write (No restriction) and Read Table 73 WD_answer 1 01000 #40(28h) Write (No restriction) and Read Table 75 FS_OUT 1 01001 #41(29h) Write (No restriction) Table 77 RSTb request 1 01010 #42(2Ah) Write (No restriction) Table 79 INIT WD 1 01011 #43(2Bh) Write during INIT phase then Read only Table 81 Diag FS1 1 01100 #44(2Ch) Read only Table 83 WD_Counter 1 01101 #45(2Dh) Read only Table 85 Diag_FS2 1 01110 #46(2Eh) Read only Table 87 Table 16. Secured SPI Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 Data 3 Data 2 Data 1 Data 0 Secure 3 Secure2 Secure 1 Secure 0 Table 15. Register mapping of fail-safe logic (continued) Register Address Write description Table ref. FS/M A4 A3 A2 A1 A0 Hex |
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