841S012DI Datasheet

©2016 Integrated Device Technology, Inc

January 4, 2016

16

POWER CONSIDERATIONS

This section provides information on power dissipation and junction temperature for the 841S012DI.

Equations and example calculations are also provided.

1. Power Dissipation.

The total power dissipation for the 841S012DI is the sum of the core power plus the power dissipated in the load(s).

The following is the power dissipation for V

DD

= 3.3V + 5% = 3.465V, which gives worst case results.

Core and HCSL Output Power Dissipation

The maximum I

DD

current at 85° is 284mA. The HCSL output current (17mA per output pair) is included in this value. For power

considerations, this output current is treated separately from the core currents, so for power calculations,

I

DD

= 284mA - 2 * 17mA = 250mA.

• Power (core) = V

DD_MAX

* (I

DD

+ I

DDA

) = 3.465V * (250mA + 20mA) = 935.6mW

Power (HCSL) = 44.5mW/Load Output Pair

If all outputs are loaded, the total power is 2 * 44.5mW = 89mW

LVCMOS Output Power Dissipation

• Dynamic Power Dissipation at 200MHz, (QB, QC)

Power (200MHz) = C

PD

* Frequency * (V

DDO

)

2

= 19pF * 200MHz * (3.465V)

2

= 45mW per output

Total Power (200MHz) = 45mW * 8 = 360mW

• Dynamic Power Dissipation at 25MHz, (REF_OUT)

Power (25MHz) = C

PD

* Frequency * (V

DDO

)

2

= 19pF * 25MHz * (3.465V)

2

= 5.6mW per output

Total Power (25MHz) = 5.6mW * 2 = 11.2mW

Total Power Dissipation

• Total Power

= Power (core) + Power (HCSL) + Total Power (200MHz) + Total Power (25MHz)

= 935.6mW + 89mW + 360mW + 11mW

= 1396mW