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LT1725IGN 数据表(PDF) 7 Page - Linear Technology |
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LT1725IGN 数据表(HTML) 7 Page - Linear Technology |
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7 / 28 page ![]() 7 LT1725 1725f BLOCK DIAGRA COMP ENDLY MINENAB tON IAMP FDBK FB OSCAP OSC MOSFET DRIVER UVLO VCC 3VOUT 3V REG (INTERNAL) BIAS VC SOFT-START LOAD COMPENSATION ISENSE GATE PGND ROCMP SFST RCMPC SGND 1725 BD LOGIC PI FU CTIO S ENDLY (Pin 13): Pin for external programming resistor to set enable delay time. See Applications Information for details. tON (Pin 14): Pin for external programming resistor to set switch minimum on time. See Applications Information for details. VCC (Pin 15): Supply voltage for the LT1725. Bypass this pin to ground with 1 µF or more. GATE (Pin 16): This is the gate drive to the external power MOSFET switch and has large dynamic currents flowing through it. Keep the trace to the MOSFET as short as possible to minimize electromagnetic radiation and volt- age spikes. A series resistance of 5 Ω or more may help to dampen ringing in less than ideal layouts. |
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