LT1725IGN datasheet(15/28 Pages) LINER

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LT1725

1725f

to transformer leakage inductance. This spike is not in-

dicative of actual output voltage (see Figure 4B). Delaying

the enabling of the feedback amplifier allows this system

to effectively ignore most or all of the voltage spike and

maintain proper output voltage regulation. The enable

delay time should therefore be set to the maximum ex-

pected duration of the leakage spike. This may have

implications regarding output voltage regulation at mini-

mum load (see Minimum Load Considerations).

A second benefit of the enable delay time function occurs

at light load. Under such conditions the amount of energy

stored in the transformer is small. The flyback waveform

becomes “lazy” and some time elapses before it indicates

the actual secondary output voltage (see Figure 4C). So

the enable delay time should also be set long enough to

ignore the “irrelevant” portion of the flyback waveform at

light load.

Additionally, there are cases wherein the gate output is

called upon to drive a large geometry MOSFET such that

the turnoff transition is slowed significantly. Under such

circumstances, the enable delay time may be increased to

accommodate for the lengthy transition.

Minimum Enable Time

This function sets a minimum duration for the expected

flyback pulse. Its primary purpose is to provide a mini-

mum source current at the VC node to avoid start-up

problems.

Average “start-up” VC current =

Minimum Enable Time

Switching Frequency

ISRC

•

Minimum enable time can also have implications at light

load (see Minimum Load Considerations). The temptation

is to set the minimum enable time to be fairly short, as this

is the least restrictive in terms of minimum load behavior.

However, to provide a “reliable” minimum start-up current

of say, nominally 1

µA, the user should set the minimum

enable time at no less that 2% of the switching period

(= 1/switching frequency).

CURRENT SENSE RESISTOR CONSIDERATIONS

The external current sense resistor allows the user to

optimize the current limit behavior for the particular appli-

cation under consideration. As the current sense resistor

is varied from several ohms down to tens of milliohms,

peak switch current goes from a fraction of an ampere to

tens of amperes. Care must be taken to ensure proper

circuit operation, especially with small current sense

resistor values.

For example, a peak switch current of 10A requires a sense

resistor of 0.025

Ω.Notethattheinstantaneouspeakpower

in the sense resistor is 2.5W, and it must be rated accord-

ingly. The LT1725 has only a single sense line to this re-

sistor. Therefore, any parasitic resistance in the ground side

connection of the sense resistor will increase its apparent

value. In the case of a 0.025

Ωsenseresistor, onemilliohm

of parasitic resistance will cause a 4% reduction in peak

switch current. So resistance of printed circuit copper

traces and vias cannot necessarily be ignored.

An additional consideration is parasitic inductance. Induc-

tance in series with the current sense resistor will accen-

tuate the high frequency components of the current

waveform. In particular, the gate switching spike and

multimegahertz ringing at the MOSFET can be considerably

APPLICATIO S I FOR ATIO

ENABLE DELAY

TIME NEEDED

1725 F04

DISCONTINUOUS

MODE

RINGING

IDEALIZED FLYBACK

WAVEFORM

MOSFET GATE DRIVE

FLYBACK WAVEFORM

WITH LARGE LEAKAGE

SPIKE AT HEAVY LOAD

“SLOW” FLYBACK

WAVEFORM AT

LIGHT LOAD

ENABLE

DELAY

TIME

NEEDED

Figure 4

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