ZSSC3122 Datasheet

© 2018 Integrated Device Technology, Inc.

33

June 8, 2018

10.6.5.2 SPI Measurement Request

The SPI MR is used to wake up the device in Sleep Mode and start a complete measurement cycle starting with a temperature

measurement/temperature DSP calculation, followed by a capacitance measurement / capacitance DSP calculations, and then the results are

written to the digital output register. As shown in Figure 10.13, executing an SPI MR command is a read of 8 bits, ignoring the data that is

returned.

Note: The SPI MR function can also be accomplished by performing a full SPI Data Fetch (see section 10.6.4.2) and ignoring the invalid data

that will be returned.

Figure 10.13 SPI MR

10.6.6 Ready Pin

A rise on the Ready pin indicates that new data is ready to be fetched from either the I2C or SPI interface. The Ready pin stays high until a

Data Fetch (DF) command is sent (see section 10.6.3); it stays high even if additional measurements are performed before the DF. In Sleep

Mode, sending a Measurement Request (MR) command resets the Ready pin.

The Ready pin’s output driver type is selectable as either full push-pull or open drain via the Ready_Open_Drain bit in EEPROM word

Cust_Config (see Table 12.5 for bit assignments and settings). Point-to-point communication most likely uses the full push-pull driver. If an

application requires interfacing to multiple parts, then the open-drain option can allow for just one wire and one pull-up resistor to connect all

the parts in a bus format.

10.7 PDM (Pulse Density Modulation)

PDM outputs for both corrected capacitance and temperature are available. PDM_C (capacitance PDM) appears on the READY/PDM_C pin,

and PDM_T (temperature PDM) appears on the ALARM_LOW/PDM_T pin if enabled using the Output_Selection bits (see Table 12.2). The

typical PDM frequency is 231.25kHz (i.e., the oscillator frequency 1.85MHz

 minimum/maximum corners of the oscillator frequency divided

by 8). Both PDM signals are 14-bit values. In PDM Mode, the ZSSC3122 must be programmed to Update Mode (see section 10.3.1). Every

time a conversion cycle has finished, the PDM will begin outputting the new value.

An analog output value is created by low-pass filtering the output; a simple first-order RC filter will work in this application.

Select the time constant of the filter based on the requirements for settling time and/or peak-to-peak ripple.

Important: The resistor of the RC filter must be ≥10k

.

Table 10.12 shows some filter examples using a 10k

 resistor.

SCLK

MISO

SS

x

x

Ignore Data