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ZSSC3122AI3BN 数据表(PDF) 4 Page - Renesas Technology Corp |
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ZSSC3122AI3BN 数据表(HTML) 4 Page - Renesas Technology Corp |
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4 / 59 page ![]() ZSSC3122 Datasheet © 2018 Integrated Device Technology, Inc. 4 June 8, 2018 List of Figures Figure 1.1 Pin Assignments for 4.4 5.0 mm 14-TSSOP – Top View...........................................................................................................6 Figure 6.1 Best Case Settings (Typical Part)................................................................................................................................................11 Figure 6.2 Worst Case Settings (Typical Part) .............................................................................................................................................11 Figure 6.3 Typical Current Consumption during Sleep Mode (No Measurements) ......................................................................................11 Figure 7.1 Output High Drive Strength Graph ..............................................................................................................................................12 Figure 7.2 Output Low Drive Strength Graph ...............................................................................................................................................12 Figure 8.1 First Order Fit (Typical Part) ........................................................................................................................................................13 Figure 8.2 Second Order Fit (Typical Part)...................................................................................................................................................13 Figure 9.1 ZSSC3122 Block Diagram...........................................................................................................................................................14 Figure 10.1 General Operation .......................................................................................................................................................................20 Figure 10.2 Power-On Sequence with Fast Startup Bit Set in EEPROM .......................................................................................................21 Figure 10.3 Measurement Cycle Timing.........................................................................................................................................................22 Figure 10.4 Measurement Sequence in Update Mode ...................................................................................................................................23 Figure 10.5 I2C and SPI Data Fetching in Update Mode................................................................................................................................24 Figure 10.6 Measurement Sequence in Sleep Mode (Only I2C, SPI, or Alarms) ...........................................................................................25 Figure 10.7 I2C and SPI Data Fetching in Sleep Mode..................................................................................................................................26 Figure 10.8 I2C Timing Diagram.....................................................................................................................................................................29 Figure 10.9 SPI Timing Diagram ....................................................................................................................................................................30 Figure 10.10 I2C Measurement Packet Reads.................................................................................................................................................31 Figure 10.11 SPI Output Packet with Positive Edge Sampling.........................................................................................................................32 Figure 10.12 I2C MR ........................................................................................................................................................................................32 Figure 10.13 SPI MR ........................................................................................................................................................................................33 Figure 10.14 Example of Alarm Function .........................................................................................................................................................35 Figure 10.15 Alarm Output Flow Chart .............................................................................................................................................................36 Figure 11.1 I2C Command Format .................................................................................................................................................................37 Figure 11.2 Command Mode Data Fetch .......................................................................................................................................................40 Figure 14.1 Digital Output with Optional Alarms Example..............................................................................................................................49 Figure 14.2 Analog Output with Optional Alarms Example.............................................................................................................................50 Figure 14.3 Bang-Bang Control System Example ..........................................................................................................................................51 Figure 14.4 Differential Input Capacitance Example ......................................................................................................................................52 Figure 14.5 Ext. Reference Input Capacitance Example................................................................................................................................53 |
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