AD8311

Rev. 0 | Page 21 of 24

Figure 42. Layout of Component Side (WLCSP)

Figure 43. Layout of Circuit Side (WLCSP)

Figure 44. Silkscreen of Component Side (WLCSP)

Figure 45. Silkscreen of Circuit Side (WLCSP)

Table 5. Evaluation Board Configuration Options

Component

Function

Default Condition

VPOS, GND

Supply and Ground Vector Pins.

Not Applicable

R1

Input Interface. The 52.3 Ω resistor in Position R1 combines with the AD8311’s internal

input impedance to give a broadband input impedance of around 50 Ω. Note that the

AD8311’s RF input is internally ac-coupled.

R1 = 52.3 Ω (Size 0402)

R3, R4, C3

R3 = 0 Ω (Size 0402)

R4 = C3 = open (Size 0402)

C1, C2

Power Supply Decoupling. The nominal supply decoupling consists of a 0.1 µF capacitor at

C1. C2 can be used for additional supply decoupling.

C1 = 0.1 µF (Size 0402)

C2 = 100 pF (Size 0402)

C4, R2

FLTR (Pin 4) and ground. The control loop phase margin can be increased by adding a series

resistor.

C4 = open (Size 0402)

R2 = 0 Ω (Size 0402)

J1, J2, J3

Measurement Mode. A quasi-measurement mode can be implemented by installing J1 and

VSET. In this mode, a large capacitor (0.01 µF or greater) must be installed in C4. J3 can be

installed to power the op-amp with the VPOS power supply. Alternately, the op-amp can be

powered with the VS supply pin.

J1, J2 = installed

J3 = installed

R9, R10

Alternate Interface. R5 and R6 allow for VOUT and VSET to be accessible from the edge

connector, which is only used for characterization.

R9 = R10 = open

(Size 0402)