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ICS9LPR501 数据表(PDF) 21 Page - Renesas Technology Corp

部件名 ICS9LPR501
功能描述  64-PIN CK505 W/FULLY INTEGRATED VOLTAGE REGULATOR
PDF  22 Pages
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制造商  RENESAS [Renesas Technology Corp]
网页  http://www.renesas.com
标志 RENESAS - Renesas Technology Corp

ICS9LPR501 数据表(HTML) 21 Page - Renesas Technology Corp

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21
Innovate with IDT and accelerate your future networks. Contact:
www.IDT.com
For Sales
800-345-7015
408-284-8200
Fax: 408-284-2775
For Tech Support
408-284-6578
pcclockhelp@idt.com
Corporate Headquarters
Integrated Device Technology, Inc.
6024 Silver Creek Valley Road
San Jose, CA 95138
United States
800 345 7015
+408 284 8200 (outside U.S.)
Asia Pacific and Japan
Integrated Device Technology
Singapore (1997) Pte. Ltd.
Reg. No. 199707558G
435 Orchard Road
#20-03 Wisma Atria
Singapore 238877
+65 6 887 5505
Europe
IDT Europe, Limited
Prime House
Barnett Wood Lane
Leatherhead, Surrey
United Kingdom KT22 7DE
+44 1372 363 339
© 2006 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice. IDT and the IDT logo are trademarks of Integrated
Device Technology, Inc. Accelerated Thinking is a service mark of Integrated Device Technology, Inc. All other brands, product names and marks are or may be trademarks
or registered trademarks used to identify products or services of their respective owners.
Printed in USA
TM
ICS9LPR501
64-PIN CK505 W/FULLY INTEGRATED VOLTAGE REGULATOR
Datasheet
Revision History
Rev.
Issue Date Description
Page #
A
10/27/2006
1. Updated Byte 11
2. Updated IDD to CK505 Rev 1.0 spec
Various
B
2/9/2007
1. Updated M/N programming bytes, removed the +2 and +8
2. Added Byte 63 bit 1 for SATA PLL on/off
Various
C
4/3/2007
Added Bytes 24-25.
20
D
4/17/2007
Removed SSOP Ordering Information.
22
E
8/8/2007
Release to Final.
-
F
11/6/2007
Added Foot Note on SMBus.
19
G
2/19/2008
1. Updated PLL3 Configuration Table.
2. Updated Power Management Table to Show Hi-z on latched inputs during PD.
11
H
3/7/2008
Updated Electrical Characteristics
7-9
J
12/5/2008
Added Electrical table for SE1/2-25MHz.
10
K
2/9/2009
Updated Electrical Characteristics
Various
L
2/23/2009
Updated note under Byte 63 table.
18
M
11/24/2009 Removed references to PCIe Gen2 performance.
Various
N
5/19/2011
1. Updated Electrical Tables to latest CK505 format
2. Added note to SMBus byte 0 clarifying interaction with Byte 63
3. Updated ordering information to latest format
7-10, 14,
20



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