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ICS83940DI 数据表(PDF) 2 Page - Renesas Technology Corp |
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ICS83940DI 数据表(HTML) 2 Page - Renesas Technology Corp |
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2 / 17 page ![]() 2 ©2020 Renesas Electronics Corporation January 7, 2020 ICS83940DI Datasheet Pin Descriptions and Characteristics Table 1. Pin Descriptions NOTE: Pullup and Pulldown refers to internal input resistors. See Table 2, Pin Characteristics, for typical values. Table 2. Pin Characteristics Number Name Type Description 1, 2, 12, 17, 25 GND Power Power supply ground. 3 LVCMOS_CLK Input Pulldown Single-ended clock input. LVCMOS/LVTTL interface levels. 4 CLK_SEL Input Pulldown Clock select input. When HIGH, selects LVCMOS_CLK input. When LOW, selects PCLK, nPCLK inputs. LVCMOS / LVTTL interface levels. 5 PCLK Input Pulldown Non-inverting differential LVPECL clock input. 6nPCLK Input Pullup/ Pulldown Inverting differential LVPECL clock input. VDD/2 default when left floating. 7, 21 VDD Power Power supply pin. 8, 16, 29 VDDO Power Output supply pins. 9, 10, 11, 13, 14, 15, 18, 19, 20, 22, 23, 24, 26, 27, 28, 30, 31, 32 Q17, Q16, Q15, Q14, Q13, Q12, Q11, Q10, Q9, Q8, Q7, Q6, Q5, Q4, Q3, Q2, Q1, Q0 Output Single-ended clock outputs. LVCMOS/LVTTL interface levels. Symbol Parameter Test Conditions Minimum Typical Maximum Units CIN Input Capacitance 4 pF RPULLUP Input Pullup Resistor 51 k RPULLDOWN Input Pulldown Resistor 51 k CPD Power Dissipation Capacitance (per output) 6pF ROUT Output Impedance 18 28 |
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