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ICS87004 数据表(PDF) 4 Page - Renesas Technology Corp |
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ICS87004 数据表(HTML) 4 Page - Renesas Technology Corp |
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4 / 16 page ![]() ICS87004AG REVISION C DECEMBER 1, 2009 4 ©2009 Integrated Device Technology, Inc. ICS87004 Data Sheet 1:4, DIFFERENTIAL-TO-LVCMOS/LVTTL ZERO DELAY CLOCK GENERATOR Table 3B. PLL Bypass Function Table Inputs Outputs PLL_SEL = 0 PLL Bypass Mode SEL3 SEL2 SEL1 SEL0 Q[0:3] 0000 ÷8 0001 ÷8 0010 ÷8 0011 ÷16 0100 ÷16 0101 ÷16 0110 ÷32 0111 ÷32 1000 ÷64 1001 ÷128 1010 ÷4 1011 ÷4 1100 ÷8 1101 ÷2 1110 ÷4 1111 ÷2 |
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