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DSPIC30F 数据表(PDF) 99 Page - Microchip Technology |
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DSPIC30F 数据表(HTML) 99 Page - Microchip Technology |
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99 / 220 page ![]() 2004 Microchip Technology Inc. Preliminary DS70116C-page 97 dsPIC30F5011/5013 16.0 UNIVERSAL ASYNCHRONOUS RECEIVER TRANSMITTER (UART) MODULE This section describes the Universal Asynchronous Receiver/Transmitter Communications module. 16.1 UART Module Overview The key features of the UART module are: • Full-duplex, 8 or 9-bit data communication • Even, odd or no parity options (for 8-bit data) • One or two Stop bits • Fully integrated baud rate generator with 16-bit prescaler • Baud rates range from 38 bps to 1.875 Mbps at a 30 MHz instruction rate • 4-word deep transmit data buffer • 4-word deep receive data buffer • Parity, framing and buffer overrun error detection • Support for interrupt only on address detect (9th bit = 1) • Separate transmit and receive interrupts • Loopback mode for diagnostic support FIGURE 16-1: UART TRANSMITTER BLOCK DIAGRAM Write Write UTX8 UxTXREG Low Byte Load TSR Transmit Control – Control TSR – Control Buffer – Generate Flags – Generate Interrupt Control and Status bits UxTXIF Data ‘0’ (Start) ‘1’ (Stop) Parity Parity Generator Transmit Shift Register (UxTSR) 16 Divider Control Signals 16x Baud Clock from Baud Rate Generator Internal Data Bus UTXBRK UxTX Note: x = 1 or 2. |
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