ADCMP603

Rev. 0 | Page 12 of 16

50

150

250

350

450

550

650

HYSTERESIS RESISTOR (kΩ)

1

10

100

1000

The ADCMP603 comparator offers a programmable hysteresis

feature that can significantly improve accuracy and stability.

Connecting an external pull-down resistor or a current source

from the LE/HYS pin to GND varies the amount of hysteresis in

a predictable, stable manner. Leaving the LE/HYS pin

disconnected or driving it high removes the hysteresis. The

maximum hysteresis that can be applied using this pin is

approximately 160 mV. Figure 18 illustrates the amount of

hysteresis applied as a function of the external resistor value,

and Figure 9 illustrates hysteresis as a function of the current.

The hysteresis control pin appears as a 1.25 V bias voltage seen

through a series resistance of 7 kΩ ± 20% throughout the hysteresis

control range. The advantages of applying hysteresis in this manner

are improved accuracy, improved stability, reduced component

count, and maximum versatility. An external bypass capacitor is

not recommended on the HYS pin because it impairs the latch

function and often degrades the jitter performance of the device.

As described in the Using/Disabling the Latch Feature section,

hysteresis control need not compromise the latch function.

Figure 18. Hysteresis vs. R

Control Resistor

HYS

MINIMUM INPUT SLEW RATE REQUIREMENT

With the rated load capacitance and normal good PC Board

design practice, as discussed in the Optimizing Performance

section, these comparators should be stable at any input slew

rate with no hysteresis. Broadband noise from the input stage is

observed in place of the violent chattering seen with most other

high speed comparators. With additional capacitive loading or

poor bypassing, more persistent oscillations are seen. This

oscillation is due to the high gain bandwidth of the comparator

in combination with feedback parasitics in the package and PC

board. In many applications, chattering is not harmful since the

first cycle of the oscillation occurs close to V

CROSSOVER BIAS POINT

In both op amps and comparators, rail-to-rail inputs of this type

have a dual front-end design. Certain devices are active near the

mined point in the common-mode range, a crossover occurs. At

and the measured offset voltages and currents change.

OS

.

The ADCMP603 slightly elaborates on this scheme. Crossover

points can be found at approximately 0.8 V and 1.6 V.