ADCMP604/ADCMP605

Rev. 0 | Page 11 of 16

The ADCMP604 and ADCMP605 dispersion is typically < 1.6 ns

as the overdrive varies from 10 mV to 125 mV. This specification

applies to both positive and negative signals because each the

ADCMP604 and ADCMP605 have substantially equal delays for

positive-going and negative-going inputs and very low output

skews.

Q/Q OUTPUT

INPUT VOLTAGE

500mV OVERDRIVE

10mV OVERDRIVE

DISPERSION

Figure 17. Propagation Delay—Overdrive Dispersion

Q/Q OUTPUT

INPUT VOLTAGE

10V/ns

1V/ns

DISPERSION

Figure 18. Propagation Delay—Slew Rate Dispersion

COMPARATOR HYSTERESIS

The addition of hysteresis to a comparator is often desirable in a

noisy environment, or when the differential input amplitudes

are relatively small or slow moving. The transfer function for a

comparator with Hysteresis is shown in Figure 19. As the input

voltage approaches the threshold (0.0 V, in this example) from

below the threshold region in a positive direction, the

comparator switches from low to high when the input crosses

is crossed from below the threshold region in a negative direction.

In this manner, noise or feedback output signals centered on

0.0 V input cannot cause the comparator to switch states unless it

OUTPUT

INPUT

0

2

2

Figure 19. Comparator Hysteresis Transfer Function

The customary technique for introducing hysteresis into a

comparator uses positive feedback from the output back to the

input. One limitation of this approach is that the amount of

hysteresis varies with the output logic levels, resulting in

hysteresis that is not symmetric about the threshold. The

external feedback network can also introduce significant

parasitics that reduce high speed performance and induce

oscillation in some cases.

The ADCMP605 comparator offers a programmable hysteresis

feature that significantly improves accuracy and stability.

Connecting an external pull-down resistor or a current source

from the LE/HYS pin to GND, varies the amount of hysteresis

in a predictable and stable manner. Leaving the LE/HYS pin

disconnected or driving it high removes hysteresis. The

maximum hysteresis that can be applied using this pin is

approximately 160 mV. Figure 20 illustrates the amount of

hysteresis applied as a function of external resistor value.

Figure 11 illustrates hysteresis as a function of current.

The hysteresis control pin appears as a 1.25 V bias voltage seen

through a series resistance of 7 kΩ ± 20% throughout the

hysteresis control range. The advantages of applying hysteresis

in this manner are improved accuracy, improved stability,

reduced component count, and maximum versatility. An

external bypass capacitor is not recommended on the HYS pin

because it would likely degrade the jitter performance of the

device and impair the latch function. As described in the

Using/Disabling the Latch Feature section, hysteresis control

need not compromise the latch function.