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ADP2105/ADP2106/ADP2107

Rev. 0 | Page 26 of 32

CIRCUIT BOARD LAYOUT RECOMMENDATIONS

Good circuit board layout is essential in obtaining the best

performance from the ADP2105/ADP2106/ADP2107. Poor

circuit layout degrades the output ripple, as well as the

electromagnetic interference (EMI) and electromagnetic

compatibility (EMC) performance.

Figure 52 and Figure 53 show the ideal circuit board layout for

the ADP2105/ADP2106/ADP2107. Use this layout to achieve

the highest performance. Refer to the following guidelines if

adjustments to the suggested layout are needed.

•

Use separate analog and power ground planes. Connect

the ground reference of sensitive analog circuitry (such as

compensation and output voltage divider components) to

analog ground; connect the ground reference of power

components (such as input and output capacitors) to power

ground. In addition, connect both the ground planes to the

exposed pad of the ADP2105/ADP2106/ADP2107.

•

For each PWIN pin, place an input capacitor as close to the

PWIN pin as possible and connect the other end to the closest

power ground plane.

•

Place the 0.1 μF, 10 Ω low-pass input filter between the IN

pin and the PWIN1 pin, as close to the IN pin as possible.

•

Ensure that the high current loops are as short and as wide

as possible. Make the high current path from CIN through

L, COUT, and the PGND plane back to CIN as short as possible.

To accomplish this, ensure that the input and output

capacitors share a common PGND plane.

Also, make the high current path from PGND pin of the

ADP2105/ADP2106/ADP2107 through L and COUT back

to the PGND plane as short as possible. To do this, ensure

that the PGND pin of the ADP2105/ADP2106/ADP2107

is tied to the PGND plane as close as possible to the input

and output capacitors.

•

Place the feedback resistor divider network as close as

possible to the FB pin to prevent noise pickup. Try to

minimize the length of trace connecting the top of the

feedback resistor divider to the output while keeping away

from the high current traces and the switch node (LX) that

can lead to noise pickup. To reduce noise pickup, place an

analog ground plane on either side of the FB trace. For the

low fixed voltage options (1.2 V and 1.5 V), poor routing

of the OUT_SENSE trace can lead to noise pickup, adversely

affecting load regulation. This can be fixed by placing a 1 nF

bypass capacitor close to the OUT_SENSE pin.

•

The placement and routing of the compensation components

are critical for proper behavior of the ADP2105/ADP2106/

ADP2107. The compensation components should be placed

as close to the COMP pin as possible. It is advisable to use

0402-sized compensation components for closer placement,

leading to smaller parasitics. Surround the compensation

components with analog ground plane to prevent noise

pickup. Also, ensure that the metal layer under the

compensation components is the analog ground plane.

ADP2105ACPZ-R7 数据表(PDF) 26 Page - Analog Devices

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