Nexperia

74LVC2G38

Dual 2-input NAND gate; open drain

References

Outline

version

European

projection

Issue date

IEC

JEDEC

JEITA

SOT1233-2

- - -

sot1233-2_po

19-11-12

Unit

mm

max

nom

min

0.54 0.22

A

Dimensions (mm are the original dimensions)

SOT1233-2

A1

b1

0.80

D

Dh

e

e1

L

0.10

v

0.05

w

0.05

y

0.05

y1

0.30

0.04

0.00

0.35

1.35 0.22

0.32

A3

0.02

0.27

0.17

0.05

u

0.27

0.17

E

0.50

b

0.25

0.20

0.15

0

scale

1 mm

X2SON8: plastic thermal enhanced extremely thin small outline package; no leads;

8 terminals; body 1.35 x 0.8 x 0.32 mm

X

detail X

A1

A3

A

pin 1

index area

pin 1

index area

D

A

E

B

e

e

A

C

B

v

C

w

b

(6x)

b1

(6x)

L

(6x)

e1

7

6

5

1

8

4

Dh

2

3

Seating

Plane

C

y C

u

2x

C

u

2x

C

C

y1

0.10

(Typ.)

0.11

(ref)

Fig. 17. Package outline SOT1233-2 (X2SON8)

74LVC2G38

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Product data sheet

Rev. 14 — 21 June 2022

17 / 20