AD8190

Rev. 0 | Page 21 of 24

This 50 pF limit includes the HDMI connector, the PCB, and

whatever capacitance is seen at the input of the AD8190, or an

equivalent receiver. There is a similar limit of 100 pF of input

capacitance for the CEC line.

The parasitic capacitance of traces on a PCB increases with

trace length. To help ensure that a design satisfies the HDMI

specification, the length of the CEC and DDC lines on the PCB

should be made as short as possible. Additionally, if there is a

reference plane in the layer adjacent to the auxiliary traces in

the PCB stackup, relieving or clearing out this reference plane

immediately under the auxiliary traces significantly decreases

the amount of parasitic trace capacitance. An example of the

board stackup is shown in Figure 33.

PCB DIELECTRIC

LAYER 1: MICROSTRIP

SILKSCREEN

SILKSCREEN

PCB DIELECTRIC

PCB DIELECTRIC

LAYER 2: REFERENCE PLANE

LAYER 3: REFERENCE PLANE

LAYER 4: MICROSTRIP

W

3W

3W

REFERENCE LAYER

RELIEVED UNDERNEATH

MICROSTRIP

Figure 33. Example Board Stackup

HPD is a dc signal presented by a sink to a source to indicate

that the source EDID is available for reading. The placement of

this signal is not critical, but it should be routed as directly as

possible.

When the AD8190 is powered up, one set of the auxiliary inputs

is passively routed to the outputs. In this state, the AD8190

looks like a 100 Ω resistor between the selected auxiliary inputs

and the corresponding outputs as illustrated in Figure 27. The

AD8190 does not buffer the auxiliary signals, therefore, the

input traces, output traces, and the connection through the

AD8190 all must be considered when designing a PCB to meet

HDMI/DVI specifications. The unselected auxiliary inputs of the

AD8190 are placed into a high impedance mode when the device

is powered up. To ensure that all of the auxiliary inputs of the

AD8190 are in a high impedance mode when the device is

powered off, it is necessary to power the AMUXVCC supply as

illustrated in Figure 28.

In contrast to the auxiliary signals, the AD8190 buffers the

TMDS signals, allowing a PCB designer to layout the TMDS

inputs independently of the outputs.

Power Supplies

The AD8190 has five separate power supplies referenced to

two separate grounds. The supply/ground pairs are:

AVCC/AVEE, VTTI/AVEE, VTTO/AVEE, DVCC/DVEE,

and AMUXVCC/DVEE.

The AVCC/AVEE (3.3 V) and DVCC/DVEE (3.3 V) supplies

power the core of the AD8190. The VTTI/AVEE supply (3.3 V)

powers the input termination (see Figure 25). Similarly, the

VTTO/AVEE supply (3.3 V) powers the output termination

(see Figure 26). The AMUXVCC/DVEE supply (3.3 V to 5 V)

powers the auxiliary multiplexer core and determines the

maximum allowed voltage on the auxiliary lines. For example,

connected to +5 V relative to DVEE.

In a typical application, all pins labeled AVEE or DVEE should

be connected directly to ground. All pins labeled AVCC,

DVCC, VTTI, or VTTO should be connected to 3.3 V, and

Pin AMUXVCC tied to 5 V. The supplies can also be powered

individually, but care must be taken to ensure that each stage of

the AD8190 is powered correctly.