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74ALVT16821 数据表(PDF) 12 Page - Nexperia B.V. All rights reserved |
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74ALVT16821 数据表(HTML) 12 Page - Nexperia B.V. All rights reserved |
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12 / 16 page ![]() Nexperia 74ALVT16821 20-bit bus interface D-type flip-flop; positive-edge trigger; 3-state 74ALVT16821 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2018. All rights reserved. Product data sheet Rev. 4 — 22 January 2018 12 / 16 11 Package outline UNIT A1 A2 A3 bp c D(1) E(2) e HE L Lp Q Z y w v θ REFERENCES OUTLINE VERSION EUROPEAN PROJECTION ISSUE DATE IEC JEDEC JEITA mm 0.15 0.05 0.2 0.1 8 0 o o 0.1 DIMENSIONS (mm are the original dimensions). Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. SOT364-1 99-12-27 03-02-19 w M θ A A1 A2 D Lp Q detail X E Z e c L X (A ) 3 0.25 1 28 56 29 y pin 1 index b H 1.05 0.85 0.28 0.17 0.2 0.1 14.1 13.9 6.2 6.0 0.5 1 8.3 7.9 0.50 0.35 0.5 0.1 0.08 0.25 0.8 0.4 p E v M A A TSSOP56: plastic thin shrink small outline package; 56 leads; body width 6.1 mm SOT364-1 A max. 1.2 0 2.5 5 mm scale MO-153 Figure 9. Package outline SOT364-1 (TSSOP56) |
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