2.

Pin Descriptions

The descriptions of the pins are listed in Table 2-1.

Table 2-1. Pin Function Table

Name

8‑Lead SOIC

8‑Lead TSSOP

8‑Pad UDFN(1)

5-Lead SOT23

Function

A0(2)

1

1

1

—

Device Address Input

A1(2)

2

2

2

—

Device Address Input

A2(2)

3

3

3

—

Device Address Input

GND

4

4

4

2

Ground

SDA

5

5

5

3

Serial Data

SCL

6

6

6

1

Serial Clock

WP(2)

7

7

7

5

Write-Protect

VCC

8

8

8

4

Device Power Supply

Note: 

1.

The exposed pad on this package can be connected to GND or left floating.

2.

If the A0, A1, A2 and WP pins are not driven, they are internally pulled down to GND. In order to operate in a

wide variety of application environments, the pull‑down mechanism is intentionally designed to be somewhat

strong. Once these pins are biased above the CMOS input buffer’s trip point (~0.5 x VCC), the pull‑down

mechanism disengages. Microchip recommends connecting these pins to a known state whenever possible.

2.1

Device Address Inputs (A0, A1, A2)

The A0, A1 and A2 pins are device address inputs that are hard-wired (directly to GND or to VCC) for compatibility

with other two-wire Serial EEPROM devices. When the pins are hard-wired, as many as eight devices may be

addressed on a single bus system. A device is selected when a corresponding hardware and software match is true.

If these pins are left floating, the A0, A1 and A2 pins will be internally pulled down to GND. However, due to

capacitive coupling that may appear in customer applications, Microchip recommends always connecting the address

pins to a known state. When using a pull‑up resistor, Microchip recommends using 10 kΩ or less.

2.2

Ground

The ground reference for the power supply. GND should be connected to the system ground.

2.3

Serial Data (SDA)

The SDA pin is an open-drain bidirectional input/output pin used to serially transfer data to and from the device. The

SDA pin must be pulled high using an external pull-up resistor (not to exceed 10 kΩ in value) and may be wire-ORed

with any number of other open-drain or open-collector pins from other devices on the same bus.

2.4

Serial Clock (SCL)

The SCL pin is used to provide a clock to the device and to control the flow of data to and from the device. Command

and input data present on the SDA pin is always latched in on the rising edge of SCL, while output data on the SDA

pin is clocked out on the falling edge of SCL. The SCL pin must either be forced high when the serial bus is idle or

pulled high using an external pull-up resistor.

2.5

Write-Protect (WP)

The write-protect input, when connected to GND, allows normal write operations. When the WP pin is connected

directly to VCC, all write operations to the protected memory are inhibited.

AT24CS32

Pin Descriptions

© 2020 Microchip Technology Inc.

Datasheet

DS20006341A-page 5