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UPD78F9211CS 数据表(PDF) 10 Page - Renesas Technology Corp

部件名 UPD78F9211CS
功能描述  MOS INTEGRATED CIRCUIT
PDF  30 Pages
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制造商  RENESAS [Renesas Technology Corp]
网页  http://www.renesas.com
标志 RENESAS - Renesas Technology Corp

UPD78F9211CS 数据表(HTML) 10 Page - Renesas Technology Corp

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Preliminary Product Information U18551EJ2V0PM
8
µPD78F9210CS, 78F9211CS, 78F9212CS
1.2
Non-port Functions
Pin Name
I/O
Function
After Reset
Alternate-
Function Pin
INTP0
P21/ANI1/TI010/
TO00
INTP1
Input
External interrupt input for which the valid edge (rising edge,
falling edge, or both rising and falling edges) can be specified
Input
P32
TI000
External count clock input to 16-bit timer/event counter 00.
Capture trigger input to capture registers (CR000 and CR010) of
16-bit timer/event counter 00
P20/ANI0/TOH1
TI010
Input
Capture trigger input to capture register (CR000) of 16-bit
timer/event counter 00
Input
P21/ANI1/TO00/
INTP0
TO00
Output
16-bit timer/event counter 00 output
Input
P21/ANI1/TI010/
INTP0
TOH1
Output
8-bit timer H1 output
Input
P20/ANI0/TI000
ANI0
P20/TI000/TOH1
ANI1
P21/TI010/TO00/
INTP0
ANI2
P22/X2
ANI3
Input
Analog input of A/D converter
Input
P23/X1
RESET
Input
System reset input
Input
P34
X1
Input
Connection of crystal/ceramic oscillator for system clock
oscillation.
External clock input
−
P23/ANI3
X2
−
Connection of crystal/ceramic oscillator for system clock
oscillation.
−
P22/ANI2
VDD
−
Positive power supply
−
−
VSS
−
Ground potential
−
−
Caution
The P22/X2/ANI2 and P23/X1/ANI3 pins are pulled down during reset.



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