MP6973

– FAST TURN-OFF INTELLIGENT RECTIFIER

MP6973 Rev. 1.0

www.MonolithicPower.com

10

6/17/2020

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© 2020 MPS. All Rights Reserved.

OPERATION

The

MP6973

supports

operation

in

discontinuous conduction mode (DCM) and

continuous conduction mode (CCM), as well as

quasi-resonant (QR) flyback converters. The

control circuitry controls the gate in forward

mode

and

turns

the

gate

off

when

the

synchronous rectification (SR) MOSFET current

drops to zero.

VDD Generation

The external capacitor at VDD supplies power

for the IC. First, SENSE charges the capacitor

via a current source with IVDD_SEN. When UVLO <

VDD < VDD_SENSE (5V), both HVC and SENSE are

allowed to charge VDD. But when VDD exceeds

VDD_SENSE, HVC charges VDD alone via a current

source with IVDD_HVC.

If VHVC < 5.7V, then VDD is regulated at VDD_SENSE

(5V). When 5.7V < VHVC < 6.7V, VDD is regulated

at VHVC - 0.7V (internal current-dependent

forward-diode voltage drop). When VHVC > 6.7V,

VDD is clamped at VDD_HVC (6.7V).

Start-Up and Under-Voltage Lockout (UVLO)

When VDD exceeds the VDD UVLO rising

threshold (4.2V), the MP6973 exits under-

voltage lockout (UVLO) and is enabled. Once

VDD drops below ~4.0V, the MP6973 enters

sleep mode and VGS is kept low.

Turn-On Phase

When VDS drops to ~2V, a turn-on timer begins.

If VDS reaches the turn-on threshold (-80mV)

from 2V within the turn-on slew rate detection

time (30ns), the MOSFET turns on after a turn-

on delay (tD_ON), typically 20ns (see Figure 2). If

VDS crosses the turn-on threshold after the timer

ends, the gate voltage remains off. This turn-on

timer prevents the MP6973 from falsely turning

on due to the ringing in DCM and quasi-resonant

operations.

Turn-On Blanking

The control circuitry contains a blanking function.

When the MOSFET turns on, the control circuit

ensures that the on state lasts for a specific

period of time. The turn-on blanking time (tB-ON)

is ~1.2µs to prevent an accidental turn-off due to

ringing. However, if VDS reaches 1.8V within the

turn-on

blanking

time,

VGS

is

pulled

low

immediately.

Conduction Phase

Once VDS exceeds the forward voltage drop,

which is -VFWD (-40mV), according to the

decrease of the switching current, the MP6973

lowers the gate voltage level to enlarge the on

resistance of the synchronous MOSFET.

-3mV

-80mV

2V

VDS

VGS

Turn-On

Delay

Turn-Off

Delay

Turn-On

Blanking

Driver Begins

to be Pulled

Down

Driver Turns

Off

2V

Turn-Off

Blanking

-40mV

Figure 2: Turn-On/Turn-Off Timing Diagram

With this control scheme, VDS is adjusted to be

approximately equal to VFWD, even when the

current through the MOSFET is fairly low. This

function keeps the driver voltage at a very low

level when the synchronous MOSFET is turned

off, which boosts the turn-off speed and is

especially important for CCM operation.

Turn-Off Phase

When VDS rises to trigger the turn-off threshold (-

3mV), the gate voltage is pulled to zero after a

short turn-off delay (tD_OFF), typically 25ns (see

Figure 2).

Turn-Off Blanking

After the gate driver (VGS) is pulled to zero by VDS

reaching the turn-off threshold (-3mV), a turn-off

blanking time is applied, during which the gate

driver signal is latched off. The turn-off blanking

is removed when VDS exceeds VB-OFF (2V) (see

Figure 2).