MP6973

– FAST TURN-OFF INTELLIGENT RECTIFIER

MP6973 Rev. 1.0

www.MonolithicPower.com

12

6/17/2020

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



 

JA

LOSS

JA

TP

(4)





 

JC

LOSS

JC

TP

(5)

The thermal resistance can be reduced by laying

a thicker copper layer, placing more thermal

dissipation vias, and adopting a heatsink. The

real maximum output current can be set by

combining the real tested data.

Design Example

Figure 4 shows a layout example for a low-side

application of a flyback power supply, specifically

a single layer with a through-hole transformer.

RSN and CSN are the RC snubber network for

the internal MOSFET. The sensing loop (SENSE

to the MOSFET drain) is optimized and kept

separate from the power loop. The VDD

decoupling capacitor (C2) is placed beside VDD.

Figure 4: Layout Example in Flyback Low-Side

Application

PCB Layout Guidelines

Efficient

PCB

layout

is

critical

for

stable

operation. For best results, refer to Figure 4 and

Figure 5, and follow the guidelines below:

Sensing for VD/SENSE

1. Connect the SENSE pin to a different

position for an adjustable turn-off time during

the fast transients in CCM. The further the

junction point is from the VD, the earlier the

SR turns off (see Figure 5).

2. Keep the IC out of the power loop to prevent

the sensing loop and power loop from

interrupting each other.

SENSE

VS

VDD

VD

Sense Position

Decoupling

Capacitor

Figure 5: Voltage Sensing for VD/SENSE

3. Place a decoupling ceramic capacitor from VDD to VS, close

to the IC, for adequate filtering.