UPD6708 datasheet(23/74 Pages) RENESAS

23 / 74 page

µPD6708

3.1

Data Link Layer Controller

The data link layer controller performs processing of the IEBus protocol data link layer (frame composition and resolution,

communication error detection, etc.), execution of communication control commands set by the host controller, and generate

a return code that informs the host controller of the communication status.

3.2

Physical Layer Controller

The physical controller performs generation and resolution of bit timing and also converts the signals between the bus

lines through the driver/receiver.

3.3

IEBus Driver/Receiver

The driver/receiver performs conversion between the logic signals within the

µPD6708 and the IEBus signals. The IEBus

signals and their relationship to the logic statuses are shown in Table 3-1.

Table 3-1. Relationship between IEBus Signals and Logical Statuses

3.4

Host Interface

The host Interface is a block which controls the transmission and reception of data to and from the host controller. It

accepts communication control commands, passes on return codes, and forwards transmit data.

The forwarding of transmit data takes place through the FIFO buffers, 4 bytes of write data buffer (WDB) and 20 bytes

of read data buffer (RDB). It also absorbs the differences between IEBus transmission speed and the transmission speed

on the serial interface between the

µPD6708 and the host controller.

Logical Status

IEBus Signals

(BUS+) – (BUS–)

≥ 120mV

(BUS+) – (BUS–)

≤ 20mV

UPD6708 数据表(PDF) 23 Page - Renesas Technology Corp