ST7L19 datasheet(119/138 Pages) STMICROELECTRONICS

119 / 138 page

ST7L15, ST7L19

119/138

CONTROL PIN CHARACTERISTICS (cont’d)

Figure 94. RESET Pin Protection When LVD Is Enabled1)2)3)4)

Figure 95. RESET Pin Protection When LVD Is Disabled1)

Note 1:

– The reset network protects the device against parasitic resets.

– The output of the external reset circuit must have an open-drain output to drive the ST7 reset pad. Otherwise the

device can be damaged when the ST7 generates an internal reset (LVD or watchdog).

– Whatever the reset source is (internal or external), the user must ensure that the level on the RESET pin can go

below the VIL maximum level specified in section 13.9.1 on page 118. Otherwise the reset is not taken into account

internally.

– Because the reset circuit is designed to allow the internal RESET to be output in the RESET pin, the user must en-

sure that the current sunk on the RESET pin is less than the absolute maximum value specified for IINJ(RESET) in

section 13.2.2 on page 99.

Note 2: When the LVD is enabled, it is recommended not to connect a pull-up resistor or capacitor. A 10nF pull-down

capacitor is required to filter noise on the reset line.

Note 3: If a capacitive power supply is used, it is recommended to connect a 1M

Ω pull-down resistor to the RESET pin

to discharge any residual voltage induced by the capacitive effect of the power supply (this adds 5µA to the power con-

sumption of the MCU).

Note 4: Tips when using the LVD:

– 1. Check that all recommendations related to ICCCLK and reset circuit have been applied (see caution in Table 1

on page 5 and notes above)

– 2. Check that the power supply is properly decoupled (100nF + 10µF close to the MCU). Refer to AN1709 and

AN2017. If this cannot be done, it is recommended to put a 100nF + 1M

Ω pull-down on the RESET pin.

– 3. The capacitors connected on the RESET pin and also the power supply are key to avoid any start-up marginality.

In most cases, steps 1 and 2 above are sufficient for a robust solution. Otherwise: Replace 10nF pull-down on the

RESET pin with a 5µF to 20µF capacitor.”

Note 5: Please refer to section 12.2.1 on page 95 for more details on illegal opcode reset conditions.

0.01µF

ST7

PULSE

GENERATOR

Filter

RON

VDD

INTERNAL

RESET

EXTERNAL

Required

Ω

Optional

(note 3)

WATCHDOG

LVD RESET

ILLEGAL OPCODE5)

0.01µF

EXTERNAL

RESET

CIRCUIT

USER

ST7

PULSE

GENERATOR

Filter

RON

VDD

INTERNAL

RESET

WATCHDOG

ILLEGAL OPCODE5)

Required

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