DA9078.003

28 January 2004

2 (10)

PAD LAYOUT

DIE size = 1.70 x 1.78 mm; PAD size = 100 x 100

µm

Note: Because the substrate of the die is internally connected to VDD, the die has to be connected to VDD or

left floating. Please make sure that VDD is the first pad to be bonded. Pick-and-place and all component

assembly are recommended to be performed in ESD protected area.

Note: Coordinates are pad center points where origin has been located in the center of VDD pad

Note: The on-chip product code 9078Bx identifies internal compensation capacitance option. x has values 1, 2,

3, 4 or 5 refering to capacitance option described in the Table 2 on page 4.

Pin Description

Name

X-coordinate

Y-coordinate

Note

Power Supply Voltage

VDD

0

µm

0

µm

Quarz Filter Output

QO

306

µm

19

µm

Quarz Filter Input

QI

586

µm

19

µm

AGC Capacitor

AGC

866

µm

19

µm

Receiver Output

OUT

1109

µm

19

µm

1

Demodulator Capacitor

DEC

1109

µm

1428

µm

AGC On Control

AON

866

µm

1428

µm

2

Power Down Input

PDN

549

µm

1428

µm

3

Receiver Input

RFI

306

µm

1428

µm

Power Supply Ground

VSS

16

µm

1407

µm

Notes:

1) OUT = VSS when carrier amplitude at maximum; OUT = VDD when carrier amplitude is reduced

(modulated)

-

-

at power down the output is pulled to VSS (pull down switch)

2) AON = VSS means AGC off (hold current gain level); AON = VDD means AGC on (working)

-

Internal pull-up with current < 1

µA which is switched off at power down

3) PDN = VSS means receiver on; PDN = VDD means receiver off

-

Fast start-up is triggered when the receiver is after power down (PDN=VDD) controlled to power up

(PDN=VSS) i.e. at the falling edge of PDN signal.

MAS

VDD QO

QI AGC OUT

VSS RFI PDN AON DEC

1702 µm

1778 µm

9078Bx