2 (7)

DA9187.002

29 January, 2004

PIN CONFIGURATION

PIN DESCRIPTION

Pin Number

MAS9187 A1

MAS9187 A2

Function

1

VREFH

VREFH

DAC output reference high voltage

2

O1

O1

DAC 1, address 0x0

3

O2

O2

DAC 2, address 0x1

4

O3

O3

DAC 3, address 0x2

5

O4

O4

DAC 4, address 0x3

6

O5

O5

DAC 5, address 0x4

7

O6

O6

DAC 6, address 0x5

8

XSHDN

XSHDN

Device analog part power-down signal (active low)

9

XCS

XCS

Device enable signal (rising edge loads data to DAC)

10

GND

GND

Device ground-pin

11

CLK

VREFL

Data clock / DAC output low reference voltage

12

SDI

CLK

Serial input data / Data clock

13

O7

SDI

DAC 7, address 0x6 / Serial input data

14

O8

O7

DAC 8, address 0x7 / DAC 7, address 0x6

15

O9

O8

DAC 9, address 0x8 / DAC 8, address 0x7

16

O10

O9

DAC 10, address 0x9 / DAC 9, address 0x8

17

O11

O10

DAC 11, address 0xA / DAC 10, address 0x9

18

O12

O11

DAC 12, address 0xB / DAC 11, address 0xA

19

XRESET

O12

Device Digital part reset – middle code preset pin/DAC

12, address 0xB

20

VDD

VDD

Device power supply pin

MAS9187 has two bonding options available:

VREFH

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

O1

O2

O3

O4

O5

O6

XSHDN

XCS

GND

O1

O2

O3

O4

O5

O6

XSHDN

XCS

GND

VDD

XRESET

O12

O11

O10

O9

O8

O7

SDI

CLK

VDD

VREFL

O12

O11

O10

O9

O8

O7

SDI

CLK

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