EB201/D

http://onsemi.com

2

Figure 2. HDTMOS versus Standard TMOS

E Cell Densities

HDTMOS

CELL

DENSITY

STANDARD

TMOS

CELL

DENSITY

Also a key factor in lowering on–resistance is the use of

low resistivity substrates. The substrate of the power

MOSFET can be thought of as the mechanical base onto

which the transistors are built. Although it comprises almost

all of the wafer thickness, its only purpose is to strengthen

the wafer for its trip through wafer processing, dicing, and

final assembly. The resistance added by the substrate is

entirely undesirable, and low resistivity substrates are a must

for ultra–low on–resistance MOSFETs. Figure 3 compares

the major on–resistance components of HDTMOS to those

of standard cell MOSFETs.

The on–resistance area product is a good figure of merit

for the power MOSFET, and lower is better for this

parameter. The original 28 m

Ω, 60 V MOSFET had an

on–resistance area product of about 7.0 m

the maximum on–resistance rating at 25

°C). Die size

reductions over the last several years have shaved the

product to about 5.5 m

MTP75N05HD, is more than a refinement of typical power

MOSFET technology. Its 2.4 m

product was

attained by completely redesigning the device and

developing an entirely new manufacturing process.

Figure 3. On–Resistance Components

SPREAD

SUB

JFET

WIRE

CHAN

METAL

ACCUM

0

1

2

3

4

5

HDTMOS

STD TMOS